sys/arch/arm/amlogic/meson8b_clkc.c

122

uint32_t cntl0 = CLK_READ(sc, HHI_SYS_CPU_CLK_CNTL0);

sys/arch/arm/amlogic/meson8b_clkc.c

159

CLK_WRITE(sc, HHI_SYS_CPU_CLK_CNTL0, cntl0);

sys/arch/arm/amlogic/meson8b_clkc.c

169

CLK_WRITE(sc, HHI_SYS_CPU_CLK_CNTL0, cntl0);

sys/arch/arm/amlogic/meson8b_clkc.c

200

HHI_SYS_CPU_CLK_CNTL0, /* reg */

sys/arch/arm/amlogic/meson8b_clkc.c

213

HHI_SYS_CPU_CLK_CNTL0, /* reg */

sys/arch/arm/amlogic/meson8b_clkc.c

218

HHI_SYS_CPU_CLK_CNTL0, /* reg */

sys/arch/arm/amlogic/meson8b_clkc.c

86

MESON_CLK_RESET(MESON8B_RESET_CPU0_SOFT_RESET, HHI_SYS_CPU_CLK_CNTL0, 24),

sys/arch/arm/amlogic/meson8b_clkc.c

87

MESON_CLK_RESET(MESON8B_RESET_CPU1_SOFT_RESET, HHI_SYS_CPU_CLK_CNTL0, 25),

sys/arch/arm/amlogic/meson8b_clkc.c

88

MESON_CLK_RESET(MESON8B_RESET_CPU2_SOFT_RESET, HHI_SYS_CPU_CLK_CNTL0, 26),

sys/arch/arm/amlogic/meson8b_clkc.c

89

MESON_CLK_RESET(MESON8B_RESET_CPU3_SOFT_RESET, HHI_SYS_CPU_CLK_CNTL0, 27),

sys/arch/arm/amlogic/mesong12_clkc.c

1266

case HHI_SYS_CPU_CLK_CNTL0:

sys/arch/arm/amlogic/mesong12_clkc.c

1285

case HHI_SYS_CPU_CLK_CNTL0:

sys/arch/arm/amlogic/mesong12_clkc.c

1326

case HHI_SYS_CPU_CLK_CNTL0:

sys/arch/arm/amlogic/mesong12_clkc.c

778

HHI_SYS_CPU_CLK_CNTL0, /* reg */ \

sys/arch/arm/amlogic/mesong12_clkc.c

784

HHI_SYS_CPU_CLK_CNTL0, /* reg */ \

sys/arch/arm/amlogic/mesong12_clkc.c

790

HHI_SYS_CPU_CLK_CNTL0, /* reg */ \

sys/arch/arm/amlogic/mesong12_clkc.c

796

HHI_SYS_CPU_CLK_CNTL0, /* reg */ \

sys/arch/arm/amlogic/mesong12_clkc.c

802

HHI_SYS_CPU_CLK_CNTL0, /* reg */ \

sys/arch/arm/amlogic/mesong12_clkc.c

808

HHI_SYS_CPU_CLK_CNTL0, /* reg */ \

sys/arch/arm/amlogic/mesong12_clkc.c

814

HHI_SYS_CPU_CLK_CNTL0, /* reg */ \

sys/arch/arm/amlogic/mesong12_clkc.c

820

HHI_SYS_CPU_CLK_CNTL0, /* reg */ \

sys/arch/arm/amlogic/mesong12_clkc.c

828

HHI_SYS_CPU_CLK_CNTL0, /* reg */ \