sys/arch/arm/amlogic/meson8b_clkc.c

265

MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BITS(13,0)), /* sdm */

sys/arch/arm/amlogic/meson8b_clkc.c

266

MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BIT(15)), /* sdm_enable */

sys/arch/arm/amlogic/meson8b_clkc.c

267

MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BITS(24,16)), /* n2 */

sys/arch/arm/amlogic/meson8b_clkc.c

278

MESON_CLK_GATE(MESON8B_CLOCK_MPLL1, "mpll1", "mpll1_div", HHI_MPLL_CNTL8, 14),

sys/arch/arm/amlogic/mesongxbb_clkc.c

135

MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BITS(13,0)), /* sdm */

sys/arch/arm/amlogic/mesongxbb_clkc.c

136

MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BIT(15)), /* sdm_enable */

sys/arch/arm/amlogic/mesongxbb_clkc.c

137

MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BITS(24,16)), /* n2 */

sys/arch/arm/amlogic/mesongxbb_clkc.c

141

MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BITS(13,0)), /* sdm */

sys/arch/arm/amlogic/mesongxbb_clkc.c

142

MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BIT(15)), /* sdm_enable */

sys/arch/arm/amlogic/mesongxbb_clkc.c

143

MESON_CLK_PLL_REG(HHI_MPLL_CNTL8, __BITS(24,16)), /* n2 */

sys/arch/arm/amlogic/mesongxbb_clkc.c

148

MESON_CLK_GATE(MESONGXBB_CLOCK_MPLL1, "mpll1", "mpll1_div", HHI_MPLL_CNTL8, 14),