sys/arch/arm/amlogic/meson8b_clkc.c

259

MESON_CLK_PLL_REG(HHI_MPLL_CNTL7, __BITS(13,0)), /* sdm */

sys/arch/arm/amlogic/meson8b_clkc.c

260

MESON_CLK_PLL_REG(HHI_MPLL_CNTL7, __BIT(15)), /* sdm_enable */

sys/arch/arm/amlogic/meson8b_clkc.c

261

MESON_CLK_PLL_REG(HHI_MPLL_CNTL7, __BITS(24,16)), /* n2 */

sys/arch/arm/amlogic/meson8b_clkc.c

277

MESON_CLK_GATE(MESON8B_CLOCK_MPLL0, "mpll0", "mpll0_div", HHI_MPLL_CNTL7, 14),

sys/arch/arm/amlogic/mesongxbb_clkc.c

129

MESON_CLK_PLL_REG(HHI_MPLL_CNTL7, __BITS(13,0)), /* sdm */

sys/arch/arm/amlogic/mesongxbb_clkc.c

130

MESON_CLK_PLL_REG(HHI_MPLL_CNTL7, __BIT(15)), /* sdm_enable */

sys/arch/arm/amlogic/mesongxbb_clkc.c

131

MESON_CLK_PLL_REG(HHI_MPLL_CNTL7, __BITS(24,16)), /* n2 */

sys/arch/arm/amlogic/mesongxbb_clkc.c

147

MESON_CLK_GATE(MESONGXBB_CLOCK_MPLL0, "mpll0", "mpll0_div", HHI_MPLL_CNTL7, 14),