sys/arch/cobalt/stand/boot/lcd.c

113

CSR_WRITE(lcd_base, IREG, cmd_ddramset(HD_ROW2_ADDR + i));

sys/dev/ic/hd44780_subr.c

57

#define COORD_TO_DADDR(x, y) ((y) * HD_ROW2_ADDR + (x))

sys/dev/ic/hd44780_subr.c

60

#define IDX_TO_DADDR(idx) (IDX_TO_ROW((idx)) * HD_ROW2_ADDR + \

sys/dev/ic/hd44780_subr.c

62

#define DADDR_TO_ROW(daddr) ((daddr) / HD_ROW2_ADDR)

sys/dev/ic/hd44780_subr.c

63

#define DADDR_TO_COL(daddr) ((daddr) % HD_ROW2_ADDR)

sys/dev/ic/hd44780_subr.c

635

hi = HD_ROW2_ADDR + sc->sc_vcols;

sys/dev/ic/hd44780_subr.c

637

addr = HD_ROW2_ADDR + io->dat - sc->sc_vcols;

sys/dev/ic/hd44780_subr.c

639

addr = HD_ROW2_ADDR;

sys/dev/ic/hd44780_subr.c

64

#define DADDR_TO_CHIPDADDR(daddr) ((daddr) % (HD_ROW2_ADDR * 2))

sys/dev/ic/hd44780_subr.c

65

#define DADDR_TO_CHIPNO(daddr) ((daddr) / (HD_ROW2_ADDR * 2))

sys/dev/ic/hd44780_subr.c

670

hd44780_ir_write(sc, en, cmd_ddramset(HD_ROW2_ADDR));