AM7930_DREG_DR
regs[AM7930_DREG_DR] = AM7930_INIT_PMS_ACTIVE | AM7930_INIT_INT_ENABLE;
regs[AM7930_DREG_DR] = 0;
regs[AM7930_DREG_DR] = 0;
regs[AM7930_DREG_DR] = (AM7930_MCRCHAN_BB << 4) | AM7930_MCRCHAN_BA;
regs[AM7930_DREG_DR] = AM7930_MCR4_INT_ENABLE;
AM7930_DWRITE(sc, AM7930_DREG_DR, val);
return AM7930_DREAD(sc, AM7930_DREG_DR);
AM7930_DWRITE(sc, AM7930_DREG_DR, val);
AM7930_DWRITE(sc, AM7930_DREG_DR, val >> 8);
lo = AM7930_DREAD(sc, AM7930_DREG_DR);
hi = AM7930_DREAD(sc, AM7930_DREG_DR);