Symbol: GMAC_DMA_CHAN0_CONTROL_DSL_SHIFT
sys/dev/ic/dwc_eqos.c
755
val |= ((DESC_ALIGN - 16) / 8) << GMAC_DMA_CHAN0_CONTROL_DSL_SHIFT;
sys/dev/ic/dwc_eqos_reg.h
280
#define GMAC_DMA_CHAN0_CONTROL_DSL_MASK (0x7U << GMAC_DMA_CHAN0_CONTROL_DSL_SHIFT)