sys/arch/arm/cortex/gic.c

479

const bus_size_t priority_reg = GICD_IPRIORITYRn(is->is_irq / 4);

sys/arch/arm/cortex/gic.c

492

const bus_size_t priority_reg = GICD_IPRIORITYRn(i / 4);

sys/arch/arm/cortex/gic.c

502

const bus_size_t priority_reg = GICD_IPRIORITYRn(i / 4);

sys/arch/arm/cortex/gic_reg.h

293

#define GICv1_ICDIPRn(n) GICD_IPRIORITYRn(n)

sys/arch/arm/cortex/gicv3.c

223

ipriority = gicd_read_4(sc, GICD_IPRIORITYRn(is->is_irq / 4));

sys/arch/arm/cortex/gicv3.c

226

gicd_write_4(sc, GICD_IPRIORITYRn(is->is_irq / 4), ipriority);

sys/arch/arm/cortex/gicv3.c

268

gicd_write_4(sc, GICD_IPRIORITYRn(n / 4), ~0);

sys/arch/arm/cortex/gicv3.c

834

const uint32_t oiprio = gicd_read_4(sc, GICD_IPRIORITYRn(8));

sys/arch/arm/cortex/gicv3.c

835

gicd_write_4(sc, GICD_IPRIORITYRn(8), oiprio | 0xff);

sys/arch/arm/cortex/gicv3.c

836

const uint8_t pribits = gicd_read_4(sc, GICD_IPRIORITYRn(8)) & 0xff;

sys/arch/arm/cortex/gicv3.c

837

gicd_write_4(sc, GICD_IPRIORITYRn(8), oiprio);