sys/arch/arm/cortex/gic.c

625

gicd_write(sc, GICD_CTRL, 0); /* disable all interrupts */

sys/arch/arm/cortex/gic.c

686

gicd_write(sc, GICD_CTRL, GICD_CTRL_Enable); // enable Distributer

sys/arch/arm/cortex/gicv3.c

146

while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP)

sys/arch/arm/cortex/gicv3.c

165

while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP)

sys/arch/arm/cortex/gicv3.c

254

gicd_ctrl = gicd_read_4(sc, GICD_CTRL);

sys/arch/arm/cortex/gicv3.c

256

gicd_write_4(sc, GICD_CTRL, gicd_ctrl);

sys/arch/arm/cortex/gicv3.c

259

while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP)

sys/arch/arm/cortex/gicv3.c

281

while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP)

sys/arch/arm/cortex/gicv3.c

286

gicd_write_4(sc, GICD_CTRL, gicd_ctrl);

sys/arch/arm/cortex/gicv3.c

811

const uint32_t gicd_ctrl = gicd_read_4(sc, GICD_CTRL);

sys/arch/arm/vexpress/vexpress_platform.c

134

GICD_CTRL, GICD_CTRL_Enable);

sys/arch/arm/vexpress/vexpress_platform.c

156

bus_space_write_4(gicd_bst, gicd_bsh, GICD_CTRL, 0);