sys/arch/evbmips/alchemy/dbau1550.c

151

sysclk = GET32(SYS_CLKSRC);

sys/arch/evbmips/alchemy/dbau1550.c

159

pinfunc = GET32(SYS_PINFUNC);

sys/dev/pci/radeonfb.c

1622

saved = GET32(sc, reg);

sys/dev/pci/radeonfb.c

1624

if (GET32(sc, reg) != v) {

sys/dev/pci/radeonfb.c

206

#define PRINTREG(r) DPRINTF((#r " = %08x\n", GET32(sc, r)))

sys/dev/pci/radeonfb.c

2351

if (GET32(sc, AVIVO_D1CRTC_CONTROL) & AVIVO_CRTC_EN) {

sys/dev/pci/radeonfb.c

2353

dp->rd_stride = GET32(sc, AVIVO_D1GRPH_PITCH);

sys/dev/pci/radeonfb.c

2356

if (GET32(sc, AVIVO_D2CRTC_CONTROL) & AVIVO_CRTC_EN) {

sys/dev/pci/radeonfb.c

2358

dp->rd_stride = GET32(sc, AVIVO_D2GRPH_PITCH);

sys/dev/pci/radeonfb.c

2507

v = GET32(sc, RADEON_CRTC_EXT_CNTL);

sys/dev/pci/radeonfb.c

2519

hd = ((GET32(sc, htotaldisp) >> 16) + 1) * 8;

sys/dev/pci/radeonfb.c

2520

vd = (GET32(sc, vtotaldisp) >> 16) + 1;

sys/dev/pci/radeonfb.c

2646

reg = GET32(sc, AVIVO_D1CRTC_CONTROL);

sys/dev/pci/radeonfb.c

2657

return ((GET32(dp->rd_softc, reg) & mask) ? 1 : 0);

sys/dev/pci/radeonfb.c

2825

(void)GET32(sc, AVIVO_MC_INDEX);

sys/dev/pci/radeonfb.c

2826

data = GET32(sc, AVIVO_MC_DATA);

sys/dev/pci/radeonfb.c

2828

(void)GET32(sc, AVIVO_MC_INDEX);

sys/dev/pci/radeonfb.c

2837

(void)GET32(sc, AVIVO_MC_INDEX);

sys/dev/pci/radeonfb.c

2840

(void)GET32(sc, AVIVO_MC_INDEX);

sys/dev/pci/radeonfb.c

2853

gen = GET32(sc, RADEON_CRTC_GEN_CNTL);

sys/dev/pci/radeonfb.c

2855

ext = GET32(sc, RADEON_CRTC_EXT_CNTL) & ~RADEON_CRTC_DISPLAY_DIS;

sys/dev/pci/radeonfb.c

2856

agploc = GET32(sc, RADEON_MC_AGP_LOCATION);

sys/dev/pci/radeonfb.c

2865

gen2 = GET32(sc, RADEON_CRTC2_GEN_CNTL);

sys/dev/pci/radeonfb.c

2873

aperbase = GET32(sc, RADEON_CONFIG_APER_0_BASE);

sys/dev/pci/radeonfb.c

2874

apersize = GET32(sc, RADEON_CONFIG_APER_SIZE);

sys/dev/pci/radeonfb.c

2956

PUT32(sc, RADEON_GEN_INT_STATUS, GET32(sc, RADEON_GEN_INT_STATUS));

sys/dev/pci/radeonfb.c

3124

save = GET32(sc, RADEON_CLOCK_CNTL_INDEX);

sys/dev/pci/radeonfb.c

3127

tmp = GET32(sc, RADEON_CLOCK_CNTL_DATA);

sys/dev/pci/radeonfb.c

3770

while ((GET32(sc, RADEON_RBBM_STATUS) &

sys/dev/pci/radeonfb.c

3781

if ((GET32(sc, RADEON_RBBM_STATUS) &

sys/dev/pci/radeonfb.c

3788

XNAME(sc), GET32(sc, RADEON_RBBM_STATUS));

sys/dev/pci/radeonfb.c

3799

while (GET32(sc, R300_DSTCACHE_CTLSTAT) & R300_RB2D_DC_BUSY) {

sys/dev/pci/radeonfb.c

3805

while (GET32(sc, RADEON_RB2D_DSTCACHE_CTLSTAT) &

sys/dev/pci/radeonfb.c

3838

psel = GET32(sc, R400_GB_PIPE_SELECT);

sys/dev/pci/radeonfb.c

3889

(void)GET32(sc, RADEON_DP_DATATYPE);

sys/dev/pci/radeonfb.c

3924

clkindex = GET32(sc, RADEON_CLOCK_CNTL_INDEX);

sys/dev/pci/radeonfb.c

3935

hpc = GET32(sc, RADEON_HOST_PATH_CNTL);

sys/dev/pci/radeonfb.c

3936

rbbm = GET32(sc, RADEON_RBBM_SOFT_RESET);

sys/dev/pci/radeonfb.c

3942

GET32(sc, RADEON_RBBM_SOFT_RESET);

sys/dev/pci/radeonfb.c

3957

GET32(sc, RADEON_RBBM_SOFT_RESET);

sys/dev/pci/radeonfb.c

3965

GET32(sc, RADEON_RBBM_SOFT_RESET);

sys/dev/pci/radeonfb.c

3969

GET32(sc, RADEON_HOST_PATH_CNTL);

sys/dev/pci/radeonfb.c

587

sc->sc_fp_gen_cntl = GET32(sc, RADEON_FP_GEN_CNTL);

sys/dev/pci/radeonfb.c

762

v = GET32(sc, RADEON_DAC_CNTL);

sys/dev/pci/radeonfb_i2c.c

138

if (GET32(sc, ric->ric_register) & RADEON_GPIO_SW_USE)

sys/dev/pci/radeonfb_i2c.c

98

return (GET32(sc, ric->ric_register) >> RADEON_GPIO_Y_SHIFT_0);

sys/dev/pci/radeonfbvar.h

327

#define SET32(sc, r, v) PUT32(sc, r, GET32(sc, r) | (v))

sys/dev/pci/radeonfbvar.h

328

#define CLR32(sc, r, v) PUT32(sc, r, GET32(sc, r) & ~(v))

sys/dev/pci/radeonfbvar.h

329

#define PATCH32(sc, r, v, m) PUT32(sc, r, (GET32(sc, r) & (m)) | (v))

usr.bin/midiplay/midiplay.c

475

if (GET32(buf + MARK_LEN) != HEADER_LEN) {

usr.bin/midiplay/midiplay.c

540

len = GET32(p + MARK_LEN);