Symbol: GCSC_ACC_MSR_BASE
sys/arch/evbmips/loongson/dev/glxreg.h
137
#define GCSC_ACC_GLD_MSR_CAP (GCSC_ACC_MSR_BASE + 0x00)
sys/arch/evbmips/loongson/dev/glxreg.h
138
#define GCSC_ACC_GLD_MSR_CONFIG (GCSC_ACC_MSR_BASE + 0x01)
sys/arch/evbmips/loongson/dev/glxreg.h
139
#define GCSC_ACC_GLD_MSR_SMI (GCSC_ACC_MSR_BASE + 0x02)
sys/arch/evbmips/loongson/dev/glxreg.h
140
#define GCSC_ACC_GLD_MSR_ERROR (GCSC_ACC_MSR_BASE + 0x03)
sys/arch/evbmips/loongson/dev/glxreg.h
141
#define GCSC_ACC_GLD_MSR_PM (GCSC_ACC_MSR_BASE + 0x04)
sys/arch/evbmips/loongson/dev/glxreg.h
142
#define GCSC_ACC_GLD_MSR_DIAG (GCSC_ACC_MSR_BASE + 0x05)