AIPSTZ2_BASE
#define ECSPI2_BASE (AIPSTZ2_BASE + 0x03fac000)
#define SSI1_BASE (AIPSTZ2_BASE + 0x03fcc000)
#define SSI3_BASE (AIPSTZ2_BASE + 0x03fe8000)
#define PATA_PIO_BASE (AIPSTZ2_BASE + 0x03fe0000)
#define AHBMAX_BASE (AIPSTZ2_BASE + 0x03f94000)
#define IIM_BASE (AIPSTZ2_BASE + 0x03f98000)
#define CSU_BASE (AIPSTZ2_BASE + 0x03f9c000)
#define OWIRE_BASE (AIPSTZ2_BASE + 0x03fa4000)
#define FIRI_BASE (AIPSTZ2_BASE + 0x03fa8000)
#define SDMA_BASE (AIPSTZ2_BASE + 0x03fb0000)
#define SCC_BASE (AIPSTZ2_BASE + 0x03fb4000)
#define ROMCP_BASE (AIPSTZ2_BASE + 0x03fb8000)
#define RTIC_BASE (AIPSTZ2_BASE + 0x03fbc000)
#define CSPI_BASE (AIPSTZ2_BASE + 0x03fc0000)
#define I2C1_BASE (AIPSTZ2_BASE + 0x03fc8000)
#define I2C2_BASE (AIPSTZ2_BASE + 0x03fc4000)
#define AUDMUX_BASE (AIPSTZ2_BASE + 0x03fd0000)
#define EMI_BASE (AIPSTZ2_BASE + 0x03fd8000)
#define SIM_BASE (AIPSTZ2_BASE + 0x03fe4000)
#define FEC_BASE (AIPSTZ2_BASE + 0x03fec000)
#define TVE_BASE (AIPSTZ2_BASE + 0x03ff0000)
#define VPU_BASE (AIPSTZ2_BASE + 0x03ff4000)
#define SAHARA_BASE (AIPSTZ2_BASE + 0x03ff8000)
#define DPLL_BASE(n) ((AIPSTZ2_BASE + 0x03F80000 + (0x4000 * ((n)-1))))