Symbol: EXYNOS5410_DIV_TOP0
sys/arch/arm/samsung/exynos5410_clock.c
357
CLK_DIV("aclk66", "aclk66_pre", EXYNOS5410_DIV_TOP0, __BITS(2,0)),
sys/arch/arm/samsung/exynos5410_clock.c
382
CLK_DIV("aclk200", "mout_aclk200", EXYNOS5410_DIV_TOP0, __BITS(14,12)),
sys/arch/arm/samsung/exynos5410_clock.c
383
CLK_DIV("aclk266", "sclk_mpll_muxed", EXYNOS5410_DIV_TOP0, __BITS(18,16)),
sys/arch/arm/samsung/exynos5410_clock.c
384
CLK_DIV("aclk400", "mout_aclk400", EXYNOS5410_DIV_TOP0, __BITS(26,24)),