AICREG
AICREG(AIC_IDCR) = aic_irqs;
AICREG(AIC_IECR) = aic_intr_enabled & ~aic_irqs;
AICREG(AIC_IECR) = (1U << irq);
AICREG(AIC_IDCR) = (1U << irq);
AICREG(AIC_IDCR) = -1;
AICREG(AIC_IDCR) = -1; /* disable interrupts */
AICREG(AIC_ICCR) = -1; /* clear all interrupts */
AICREG(AIC_DCR) = 0; /* not in debug mode, just to make sure */
AICREG(AIC_SMR(i)) = 0; /* disable interrupt */
AICREG(AIC_SVR(i)) = (uint32_t)&intrq[i]; // address of interrupt queue
AICREG(AIC_FVR) = 0; // fast interrupt...
AICREG(AIC_SPU) = 0; // spurious interrupt vector
AICREG(AIC_EOICR) = 0; /* clear logic... */
AICREG(AIC_EOICR) = 0; /* clear logic... */
AICREG(AIC_SMR(irq)) = smr;
iq = (struct intrq *)AICREG(AIC_IVR); // get current queue
AICREG(AIC_EOICR) = 0; // end of interrupt
ipr = AICREG(AIC_IPR);
ipr = AICREG(AIC_IPR);