sys/arch/arm/at91/at91emac.c

153

| ETH_TSR_IDLE | ETH_TSR_RLE

sys/arch/arm/at91/at91emac.c

183

while (sc->txqc > (tsr & ETH_TSR_IDLE ? 0 : 1)) {

sys/arch/arm/at91/at91emac.c

339

| ETH_TSR_IDLE | ETH_TSR_RLE

sys/arch/arm/at91/at91emac.c

735

| ETH_TSR_IDLE | ETH_TSR_RLE

sys/dev/cadence/if_cemac.c

1066

| ETH_TSR_IDLE | ETH_TSR_RLE

sys/dev/cadence/if_cemac.c

182

| ETH_TSR_IDLE | ETH_TSR_RLE

sys/dev/cadence/if_cemac.c

216

(tsr & ETH_TSR_IDLE ? 0 : 1))) {

sys/dev/cadence/if_cemac.c

458

| ETH_TSR_IDLE | ETH_TSR_RLE