sys/arch/arm/at91/at91emac.c

156

EMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));

sys/arch/arm/at91/at91emac.c

241

EMAC_WRITE(ETH_RSR, ETH_RSR_OVR); // clear interrupt

sys/arch/arm/at91/at91emac.c

342

EMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));

sys/arch/arm/at91/at91emac.c

738

EMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));

sys/dev/cadence/if_cemac.c

1069

CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));

sys/dev/cadence/if_cemac.c

185

CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));

sys/dev/cadence/if_cemac.c

305

CEMAC_WRITE(ETH_RSR, ETH_RSR_OVR);

sys/dev/cadence/if_cemac.c

461

CEMAC_WRITE(ETH_RSR, (u & (ETH_RSR_OVR | ETH_RSR_REC | ETH_RSR_BNA)));