Symbol: ENET_REG_WRITE
sys/arch/arm/imx/if_enet.c
1004
ENET_REG_WRITE(sc, ENET_RCR, v);
sys/arch/arm/imx/if_enet.c
1060
ENET_REG_WRITE(sc, ENET_EIR, ENET_EIR_MII);
sys/arch/arm/imx/if_enet.c
1063
ENET_REG_WRITE(sc, ENET_MMFR,
sys/arch/arm/imx/if_enet.c
1092
ENET_REG_WRITE(sc, ENET_EIR, ENET_EIR_MII);
sys/arch/arm/imx/if_enet.c
1095
ENET_REG_WRITE(sc, ENET_MMFR,
sys/arch/arm/imx/if_enet.c
1186
ENET_REG_WRITE(sc, ENET_ECR, ecr);
sys/arch/arm/imx/if_enet.c
1188
ENET_REG_WRITE(sc, ENET_RCR, rcr);
sys/arch/arm/imx/if_enet.c
1190
ENET_REG_WRITE(sc, ENET_TCR, tcr);
sys/arch/arm/imx/if_enet.c
1773
ENET_REG_WRITE(sc, ENET_ECR, ecr_speed | ENET_ECR_RESET);
sys/arch/arm/imx/if_enet.c
1776
ENET_REG_WRITE(sc, ENET_EIMR, 0);
sys/arch/arm/imx/if_enet.c
1777
ENET_REG_WRITE(sc, ENET_EIR, 0xffffffff);
sys/arch/arm/imx/if_enet.c
1780
ENET_REG_WRITE(sc, ENET_TCR, fulldup ? ENET_TCR_FDEN : 0);
sys/arch/arm/imx/if_enet.c
1783
ENET_REG_WRITE(sc, ENET_MIBC, ENET_MIBC_MIB_CLEAR);
sys/arch/arm/imx/if_enet.c
1784
ENET_REG_WRITE(sc, ENET_MIBC, 0);
sys/arch/arm/imx/if_enet.c
1788
ENET_REG_WRITE(sc, ENET_MSCR, __SHIFTIN(val, ENET_MSCR_MII_SPEED));
sys/arch/arm/imx/if_enet.c
1791
ENET_REG_WRITE(sc, ENET_OPD, 0x00010020);
sys/arch/arm/imx/if_enet.c
1794
ENET_REG_WRITE(sc, ENET_RSFL, 16); /* RxFIFO Section Full */
sys/arch/arm/imx/if_enet.c
1795
ENET_REG_WRITE(sc, ENET_RSEM, 0x84); /* RxFIFO Section Empty */
sys/arch/arm/imx/if_enet.c
1796
ENET_REG_WRITE(sc, ENET_RAEM, 8); /* RxFIFO Almost Empty */
sys/arch/arm/imx/if_enet.c
1797
ENET_REG_WRITE(sc, ENET_RAFL, 8); /* RxFIFO Almost Full */
sys/arch/arm/imx/if_enet.c
1800
ENET_REG_WRITE(sc, ENET_TFWR, ENET_TFWR_STRFWD |
sys/arch/arm/imx/if_enet.c
1802
ENET_REG_WRITE(sc, ENET_TSEM, 0); /* TxFIFO Section Empty */
sys/arch/arm/imx/if_enet.c
1803
ENET_REG_WRITE(sc, ENET_TAEM, 256); /* TxFIFO Almost Empty */
sys/arch/arm/imx/if_enet.c
1804
ENET_REG_WRITE(sc, ENET_TAFL, 8); /* TxFIFO Almost Full */
sys/arch/arm/imx/if_enet.c
1805
ENET_REG_WRITE(sc, ENET_TIPG, 12); /* Tx Inter-Packet Gap */
sys/arch/arm/imx/if_enet.c
1808
ENET_REG_WRITE(sc, ENET_TACC, 0);
sys/arch/arm/imx/if_enet.c
1814
ENET_REG_WRITE(sc, ENET_RACC, ENET_RACC_SHIFT16 | ENET_RACC_LINEDIS);
sys/arch/arm/imx/if_enet.c
1818
ENET_REG_WRITE(sc, ENET_FTRL, val); /* Frame Truncation Length */
sys/arch/arm/imx/if_enet.c
1824
ENET_REG_WRITE(sc, ENET_RCR,
sys/arch/arm/imx/if_enet.c
1833
ENET_REG_WRITE(sc, ENET_MRBR, RXDESC_MAXBUFSIZE);
sys/arch/arm/imx/if_enet.c
1838
ENET_REG_WRITE(sc, ENET_TDSR, paddr);
sys/arch/arm/imx/if_enet.c
1840
ENET_REG_WRITE(sc, ENET_RDSR, paddr);
sys/arch/arm/imx/if_enet.c
1852
ENET_REG_WRITE(sc, ENET_EIMR, val);
sys/arch/arm/imx/if_enet.c
1855
ENET_REG_WRITE(sc, ENET_ECR,
sys/arch/arm/imx/if_enet.c
390
ENET_REG_WRITE(sc, ENET_MIBC, ENET_MIBC_MIB_CLEAR);
sys/arch/arm/imx/if_enet.c
391
ENET_REG_WRITE(sc, ENET_MIBC, 0);
sys/arch/arm/imx/if_enet.c
430
ENET_REG_WRITE(sc, ENET_EIR, status);
sys/arch/arm/imx/if_enet.c
631
ENET_REG_WRITE(sc, ENET_RDAR, ENET_RDAR_ACTIVE);
sys/arch/arm/imx/if_enet.c
723
ENET_REG_WRITE(sc, ENET_IAUR, 0xffffffff);
sys/arch/arm/imx/if_enet.c
724
ENET_REG_WRITE(sc, ENET_IALR, 0xffffffff);
sys/arch/arm/imx/if_enet.c
752
ENET_REG_WRITE(sc, ENET_IAUR, 0);
sys/arch/arm/imx/if_enet.c
753
ENET_REG_WRITE(sc, ENET_IALR, 0);
sys/arch/arm/imx/if_enet.c
762
ENET_REG_WRITE(sc, ENET_GAUR, gaddr[1]);
sys/arch/arm/imx/if_enet.c
763
ENET_REG_WRITE(sc, ENET_GALR, gaddr[0]);
sys/arch/arm/imx/if_enet.c
790
ENET_REG_WRITE(sc, ENET_PALR, paddr);
sys/arch/arm/imx/if_enet.c
792
ENET_REG_WRITE(sc, ENET_PAUR, paddr);
sys/arch/arm/imx/if_enet.c
835
ENET_REG_WRITE(sc, ENET_RDAR, ENET_RDAR_ACTIVE);
sys/arch/arm/imx/if_enet.c
887
ENET_REG_WRITE(sc, ENET_TDAR, ENET_TDAR_ACTIVE);
sys/arch/arm/imx/if_enet.c
909
ENET_REG_WRITE(sc, ENET_ECR, v & ~ENET_ECR_ETHEREN);
sys/arch/arm/imx/if_enet.c
999
ENET_REG_WRITE(sc, ENET_FTRL, v);