EMAC3_MR0
_emac3_reg_write_4(EMAC3_MR0, MR0_TXE | MR0_RXE);
_emac3_reg_write_4(EMAC3_MR0,
_emac3_reg_read_4(EMAC3_MR0) & ~(MR0_TXE | MR0_RXE));
while (((_emac3_reg_read_4(EMAC3_MR0) & (MR0_RXI | MR0_TXI)) !=
_emac3_reg_write_4(EMAC3_MR0, MR0_SRST);
while ((_emac3_reg_read_4(EMAC3_MR0) & MR0_SRST) == MR0_SRST &&