EBUS_DMAC_DCSR
bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, EBDMA_RESET | EBDMA_TC);
csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr & ~EBDMA_RESET);
csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
bus_space_write_4(dt, dh, EBUS_DMAC_DCSR,
csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR);
bus_space_write_4(ebsc->sc_bt, ebsc->sc_pdmareg, EBUS_DMAC_DCSR,
csr = bus_space_read_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR);
bus_space_write_4(ebsc->sc_bt, ebsc->sc_cdmareg, EBUS_DMAC_DCSR,
csr = bus_space_read_4(dt, dh, EBUS_DMAC_DCSR);
bus_space_write_4(dt, dh, EBUS_DMAC_DCSR, csr);