DRAMCR3_M_RAS0DRV0
#define DRAMCR_DRAMCR3_INIT ( DRAMCR3_M_RAS0DRV0 | DRAMCR3_M_RAS0DRV1 | \
#define RAS0DRV_4MA DRAMCR3_M_RAS0DRV0
#define RAS0DRV_8MA (DRAMCR3_M_RAS0DRV0 | DRAMCR3_M_RAS0DRV1)
#define RAS0DRV_12MA (DRAMCR3_M_RAS0DRV0 | DRAMCR3_M_RAS0DRV1 | DRAMCR3_M_RAS0DRV2