sys/arch/amd64/amd64/machdep.c

2466

wrmsr(MSR_FSBASE, 0);

sys/arch/amd64/amd64/machdep.c

2467

wrmsr(MSR_KERNELGSBASE, 0);

sys/arch/amd64/include/i82093reg.h

19

wrmsr

sys/arch/evbmips/loongson/dev/gcscpcib_pci.c

107

wrmsr(msr, v);

sys/arch/evbmips/loongson/dev/glx.c

134

wrmsr(GCSC_DIVIL_BALL_OPTS, msr | 0x01);

sys/arch/evbmips/loongson/dev/glx.c

142

wrmsr(GCSC_PIC_YSEL_LOW, msr);

sys/arch/evbmips/loongson/dev/glx.c

150

wrmsr(GCSC_PIC_YSEL_HIGH, msr);

sys/arch/evbmips/loongson/dev/glx.c

157

wrmsr(GCSC_PIC_IRQM_PRIM, msr);

sys/arch/evbmips/loongson/dev/glx.c

165

wrmsr(GCSC_PIC_IRQM_LPC, msr);

sys/arch/evbmips/loongson/dev/glx.c

168

wrmsr(GCSC_PIC_ZSEL_LOW, 0);

sys/arch/evbmips/loongson/dev/glx.c

169

wrmsr(GCSC_PIC_ZSEL_HIGH, 0);

sys/arch/evbmips/loongson/dev/glx.c

437

wrmsr(pcib_bar_msr[index], msr);

sys/arch/evbmips/loongson/dev/glx.c

445

wrmsr(GCSC_GLPCI_GLD_MSR_ERROR, msr);

sys/arch/evbmips/loongson/dev/glx.c

466

wrmsr(pcib_bar_msr[index],

sys/arch/evbmips/loongson/dev/glx.c

469

wrmsr(pcib_bar_msr[index], 0ULL);

sys/arch/evbmips/loongson/dev/glx.c

564

wrmsr(GCSC_GLIU_PAE, msr);

sys/arch/evbmips/loongson/dev/glx.c

578

wrmsr(GCSC_IDE_IO_BAR, msr);

sys/arch/evbmips/loongson/dev/glx.c

580

wrmsr(GCSC_IDE_IO_BAR, 0);

sys/arch/evbmips/loongson/dev/glx.c

589

wrmsr(GCSC_IDE_CFG, (uint32_t)data);

sys/arch/evbmips/loongson/dev/glx.c

592

wrmsr(GCSC_IDE_DTC, (uint32_t)data);

sys/arch/evbmips/loongson/dev/glx.c

595

wrmsr(GCSC_IDE_ETC, (uint32_t)data);

sys/arch/evbmips/loongson/dev/glx.c

676

wrmsr(GCSC_GLIU_PAE, msr);

sys/arch/evbmips/loongson/dev/glx.c

694

wrmsr(GCSC_GLIU_IOD_BM1, msr);

sys/arch/evbmips/loongson/dev/glx.c

696

wrmsr(GCSC_GLIU_IOD_BM1, 0);

sys/arch/evbmips/loongson/dev/glx.c

788

wrmsr(GCSC_USB_MSR_OHCB, msr);

sys/arch/evbmips/loongson/dev/glx.c

806

wrmsr(GCSC_GLIU_P2D_BM3, msr);

sys/arch/evbmips/loongson/dev/glx.c

815

wrmsr(GCSC_USB_MSR_OHCB, msr);

sys/arch/evbmips/loongson/dev/glx.c

913

wrmsr(GCSC_USB_MSR_EHCB, msr);

sys/arch/evbmips/loongson/dev/glx.c

931

wrmsr(GCSC_GLIU_P2D_BM4, msr);

sys/arch/evbmips/loongson/dev/glx.c

940

wrmsr(GCSC_USB_MSR_EHCB, msr);

sys/arch/evbmips/loongson/dev/glxvar.h

22

void wrmsr(uint, uint64_t);

sys/arch/evbmips/loongson/yeeloong_machdep.c

274

wrmsr(GCSC_PIC_SHDW, 0);

sys/arch/evbmips/loongson/yeeloong_machdep.c

530

wrmsr(GCSC_GLCP_SYS_RST, rdmsr(GCSC_GLCP_SYS_RST) | 1);

sys/arch/i386/i386/longrun.c

191

wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);

sys/arch/i386/i386/longrun.c

196

wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr);

sys/arch/i386/i386/mtrr_k6.c

121

wrmsr(MSR_K6_UWCCR, uwccr);

sys/arch/i386/include/i82093reg.h

19

wrmsr

sys/arch/i386/pci/gcscide.c

217

wrmsr(drive ? GCSCIDE_ATAC_CH0D1_DMA :

sys/arch/i386/pci/gcscide.c

226

wrmsr(drive ? GCSCIDE_ATAC_CH0D1_DMA :

sys/arch/i386/pci/gcscide.c

231

wrmsr(drive ? GCSCIDE_ATAC_CH0D1_DMA :

sys/arch/i386/pci/gcscide.c

235

wrmsr(drive ? GCSCIDE_ATAC_CH0D1_PIO : GCSCIDE_ATAC_CH0D0_PIO,

sys/arch/i386/pci/gcscpcib_pci.c

107

wrmsr(msr, v);

sys/arch/i386/pci/glxsb.c

247

wrmsr(SB_GLD_MSR_CTRL, msr);

sys/arch/x86/acpi/acpi_cpu_md.c

345

wrmsr(MSR_CMPHALT, val & ~c1e);

sys/arch/x86/acpi/acpi_cpu_md.c

456

wrmsr(MSR_MISC_ENABLE, val);

sys/arch/x86/acpi/acpi_cpu_md.c

670

wrmsr(MSR_APERF, 0);

sys/arch/x86/acpi/acpi_cpu_md.c

671

wrmsr(MSR_MPERF, 0);

sys/arch/x86/acpi/acpi_cpu_md.c

766

wrmsr(ps->ps_control_addr, val);

sys/arch/x86/acpi/acpi_cpu_md.c

941

wrmsr(MSR_0FH_CONTROL, val);

sys/arch/x86/acpi/acpi_cpu_md.c

979

wrmsr(MSR_THERM_CONTROL, val);

sys/arch/x86/include/cpu_msr.h

60

wrmsr(msrdat->msr_type, msr);

sys/arch/x86/x86/cpu.c

1273

wrmsr(MSR_STAR,

sys/arch/x86/x86/cpu.c

1276

wrmsr(MSR_LSTAR, (uint64_t)Xsyscall);

sys/arch/x86/x86/cpu.c

1277

wrmsr(MSR_CSTAR, (uint64_t)Xsyscall32);

sys/arch/x86/x86/cpu.c

1278

wrmsr(MSR_SFMASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D|PSL_AC);

sys/arch/x86/x86/cpu.c

1282

wrmsr(MSR_LSTAR, (uint64_t)Xsyscall_svs);

sys/arch/x86/x86/cpu.c

1302

wrmsr(MSR_FSBASE, 0);

sys/arch/x86/x86/cpu.c

1303

wrmsr(MSR_GSBASE, (uint64_t)ci);

sys/arch/x86/x86/cpu.c

1304

wrmsr(MSR_KERNELGSBASE, 0);

sys/arch/x86/x86/cpu.c

1315

wrmsr(MSR_EFER, rdmsr(MSR_EFER) | EFER_NXE);

sys/arch/x86/x86/cpu_ucode_amd.c

190

wrmsr(MSR_UCODE_AMD_PATCHLOADER, (u_long)hdr);

sys/arch/x86/x86/cpu_ucode_intel.c

222

wrmsr(MSR_BIOS_UPDT_TRIG, (uintptr_t)uh + 48);

sys/arch/x86/x86/cpu_ucode_intel.c

58

wrmsr(MSR_BIOS_SIGN, 0);

sys/arch/x86/x86/hyperv.c

268

wrmsr(MSR_HV_REFERENCE_TSC, msr);

sys/arch/x86/x86/hyperv.c

538

wrmsr(MSR_HV_GUEST_OS_ID, MSR_HV_GUESTID_OSTYPE_NETBSD |

sys/arch/x86/x86/hyperv.c

627

wrmsr(MSR_HV_HYPERCALL, hc & MSR_HV_HYPERCALL_RSVD_MASK);

sys/arch/x86/x86/hyperv.c

633

wrmsr(MSR_HV_GUEST_OS_ID, 0);

sys/arch/x86/x86/hyperv.c

713

wrmsr(MSR_HV_HYPERCALL, hc);

sys/arch/x86/x86/hyperv.c

755

wrmsr(MSR_HV_EOM, 0);

sys/arch/x86/x86/hyperv.c

843

wrmsr(MSR_HV_SIMP, val);

sys/arch/x86/x86/hyperv.c

851

wrmsr(MSR_HV_SIEFP, val);

sys/arch/x86/x86/hyperv.c

860

wrmsr(sint, val);

sys/arch/x86/x86/hyperv.c

869

wrmsr(sint, val);

sys/arch/x86/x86/hyperv.c

876

wrmsr(MSR_HV_SCONTROL, val);

sys/arch/x86/x86/hyperv.c

889

wrmsr(MSR_HV_SCONTROL, (orig & MSR_HV_SCTRL_RSVD_MASK));

sys/arch/x86/x86/hyperv.c

896

wrmsr(sint, orig | MSR_HV_SINT_MASKED);

sys/arch/x86/x86/hyperv.c

903

wrmsr(sint, orig | MSR_HV_SINT_MASKED);

sys/arch/x86/x86/hyperv.c

909

wrmsr(MSR_HV_SIMP, (orig & MSR_HV_SIMP_RSVD_MASK));

sys/arch/x86/x86/hyperv.c

915

wrmsr(MSR_HV_SIEFP, (orig & MSR_HV_SIEFP_RSVD_MASK));

sys/arch/x86/x86/identcpu.c

1004

wrmsr(MSR_MISC_ENABLE, rdmsr(MSR_MISC_ENABLE) | (1<<3));

sys/arch/x86/x86/identcpu.c

171

wrmsr(MSR_MISC_ENABLE,

sys/arch/x86/x86/identcpu.c

352

wrmsr(MSR_BU_CFG2, val);

sys/arch/x86/x86/identcpu.c

515

wrmsr(MSR_VIA_FCR, rdmsr(MSR_VIA_FCR) | VIA_FCR_CX8_REPORT);

sys/arch/x86/x86/identcpu.c

547

wrmsr(MSR_VIA_FCR, msr & ~VIA_FCR_ALTINST_ENABLE);

sys/arch/x86/x86/identcpu.c

617

wrmsr(MSR_VIA_RNG, msr);

sys/arch/x86/x86/identcpu.c

622

wrmsr(MSR_VIA_FCR, msr | VIA_FCR_ACE_ENABLE);

sys/arch/x86/x86/lapic.c

166

wrmsr(MSR_X2APIC_BASE + (reg >> 4), val);

sys/arch/x86/x86/lapic.c

174

wrmsr(MSR_X2APIC_BASE + (reg >> 4), val);

sys/arch/x86/x86/lapic.c

234

wrmsr(MSR_APICBASE, apicbase);

sys/arch/x86/x86/lapic.c

237

wrmsr(MSR_APICBASE, apicbase);

sys/arch/x86/x86/lapic.c

384

wrmsr(MSR_APICBASE, lapic_base | APICBASE_EN);

sys/arch/x86/x86/mtrr_i686.c

233

wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~MTRR_I686_ENABLE_MASK);

sys/arch/x86/x86/mtrr_i686.c

246

wrmsr(addr, val);

sys/arch/x86/x86/mtrr_i686.c

256

wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | MTRR_I686_ENABLE_MASK);

sys/arch/x86/x86/pmap.c

969

wrmsr(MSR_CR_PAT, pat);

sys/arch/x86/x86/powernow.c

566

wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_FIDC);

sys/arch/x86/x86/powernow.c

569

wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_VIDC);

sys/arch/x86/x86/powernow.c

573

wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_VIDC);

sys/arch/x86/x86/powernow.c

576

wrmsr(MSR_AMDK7_FIDVID_CTL, ctl | PN7_CTR_FIDC);

sys/arch/x86/x86/spectre.c

255

wrmsr(MSR_IA32_SPEC_CTRL, 0);

sys/arch/x86/x86/spectre.c

265

wrmsr(MSR_IA32_SPEC_CTRL, msr);

sys/arch/x86/x86/spectre.c

274

wrmsr(MSR_IC_CFG, msr);

sys/arch/x86/x86/spectre.c

491

wrmsr(msrval, msr);

sys/arch/x86/x86/spectre.c

808

wrmsr(MSR_IA32_TSX_CTRL, msr);

sys/arch/x86/x86/spectre.c

976

wrmsr(MSR_IA32_PRED_CMD, IA32_PRED_CMD_IBPB);

sys/arch/x86/x86/sys_machdep.c

634

wrmsr(MSR_FSBASE, pcb->pcb_fs);

sys/arch/x86/x86/sys_machdep.c

639

wrmsr(MSR_KERNELGSBASE, pcb->pcb_gs);

sys/arch/xen/x86/cpu.c

1075

wrmsr(MSR_EFER, rdmsr(MSR_EFER) | EFER_NXE);

sys/arch/xen/xen/hypervisor.c

236

wrmsr(descs[1], (uintptr_t)&hypercall_page - KERNBASE);

sys/dev/nvmm/x86/nvmm_x86.h

101

struct nvmm_x86_exit_wrmsr wrmsr;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1277

if (exit->u.wrmsr.msr == MSR_EFER) {

sys/dev/nvmm/x86/nvmm_x86_svm.c

1278

if (__predict_false(exit->u.wrmsr.val & ~EFER_VALID)) {

sys/dev/nvmm/x86/nvmm_x86_svm.c

1281

if ((vmcb->state.efer ^ exit->u.wrmsr.val) &

sys/dev/nvmm/x86/nvmm_x86_svm.c

1285

vmcb->state.efer = exit->u.wrmsr.val | EFER_SVME;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1289

if (exit->u.wrmsr.msr == MSR_TSC) {

sys/dev/nvmm/x86/nvmm_x86_svm.c

1290

cpudata->gtsc = exit->u.wrmsr.val;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1295

if (msr_ignore_list[i] != exit->u.wrmsr.msr)

sys/dev/nvmm/x86/nvmm_x86_svm.c

1341

exit->u.wrmsr.msr = (cpudata->gprs[NVMM_X64_GPR_RCX] & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1342

exit->u.wrmsr.val = (rdx << 32) | (rax & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1343

exit->u.wrmsr.npc = cpudata->vmcb->ctrl.nrip;

sys/dev/nvmm/x86/nvmm_x86_svm.c

1636

wrmsr(MSR_STAR, cpudata->star);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1637

wrmsr(MSR_LSTAR, cpudata->lstar);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1638

wrmsr(MSR_CSTAR, cpudata->cstar);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1639

wrmsr(MSR_SFMASK, cpudata->sfmask);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1640

wrmsr(MSR_FSBASE, cpudata->fsbase);

sys/dev/nvmm/x86/nvmm_x86_svm.c

1641

wrmsr(MSR_KERNELGSBASE, cpudata->kernelgsbase);

sys/dev/nvmm/x86/nvmm_x86_svm.c

2801

wrmsr(MSR_VMCR, msr & ~VMCR_SVMED);

sys/dev/nvmm/x86/nvmm_x86_svm.c

2805

wrmsr(MSR_VM_HSAVE_PA, 0);

sys/dev/nvmm/x86/nvmm_x86_svm.c

2814

wrmsr(MSR_EFER, msr);

sys/dev/nvmm/x86/nvmm_x86_svm.c

2817

wrmsr(MSR_VM_HSAVE_PA, hsave[cpu_index(curcpu())].pa);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1938

if (exit->u.wrmsr.msr == MSR_TSC) {

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1939

cpudata->gtsc = exit->u.wrmsr.val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1943

if (exit->u.wrmsr.msr == MSR_CR_PAT) {

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1944

val = exit->u.wrmsr.val;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1951

if (exit->u.wrmsr.msr == MSR_MISC_ENABLE) {

sys/dev/nvmm/x86/nvmm_x86_vmx.c

1956

if (msr_ignore_list[i] != exit->u.wrmsr.msr)

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2006

exit->u.wrmsr.msr = (cpudata->gprs[NVMM_X64_GPR_RCX] & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2007

exit->u.wrmsr.val = (rdx << 32) | (rax & 0xFFFFFFFF);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2016

exit->u.wrmsr.npc = rip + inslen;

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2292

wrmsr(MSR_STAR, cpudata->star);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2293

wrmsr(MSR_LSTAR, cpudata->lstar);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2294

wrmsr(MSR_CSTAR, cpudata->cstar);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2295

wrmsr(MSR_SFMASK, cpudata->sfmask);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

2296

wrmsr(MSR_KERNELGSBASE, cpudata->kernelgsbase);

sys/dev/nvmm/x86/nvmm_x86_vmx.c

3734

wrmsr(MSR_IA32_FEATURE_CONTROL, msr |

sys/dev/pci/agp_nvidia.c

388

wrmsr(IORR_BASE0 + 2 * iorr_addr, base);

sys/dev/pci/agp_nvidia.c

389

wrmsr(IORR_MASK0 + 2 * iorr_addr, mask);

sys/dev/pci/agp_nvidia.c

393

wrmsr(SYSCFG, sys);

sys/dev/tprof/tprof_x86_amd.c

129

wrmsr(PERFCTR(counter), val);

sys/dev/tprof/tprof_x86_amd.c

155

wrmsr(PERFEVTSEL(counter), pesr);

sys/dev/tprof/tprof_x86_amd.c

169

wrmsr(PERFEVTSEL(bit), rdmsr(PERFEVTSEL(bit)) | PESR_EN);

sys/dev/tprof/tprof_x86_amd.c

181

wrmsr(PERFEVTSEL(bit), rdmsr(PERFEVTSEL(bit)) & ~PESR_EN);

sys/dev/tprof/tprof_x86_intel.c

125

wrmsr(PERFCTR(counter), val);

sys/dev/tprof/tprof_x86_intel.c

146

wrmsr(PERFEVTSEL(counter), evtval);

sys/dev/tprof/tprof_x86_intel.c

160

wrmsr(PERFEVTSEL(bit), rdmsr(PERFEVTSEL(bit)) | PERFEVTSEL_EN);

sys/dev/tprof/tprof_x86_intel.c

172

wrmsr(PERFEVTSEL(bit), rdmsr(PERFEVTSEL(bit)) &