sys/arch/arm/sunxi/sunxi_sramc.c

237

sc->sc_syscon.write_4 = sunxi_sramc_write_4;

sys/arch/hpcmips/vr/vrc4172gpio.c

120

static void write_4(struct vrc4172gpio_softc *, bus_addr_t, u_int32_t);

sys/arch/hpcmips/vr/vrc4172gpio.c

287

write_4(sc, VRC2_EXGPINTTYP, 0); /* level sence interrupt */

sys/arch/hpcmips/vr/vrc4172gpio.c

381

write_4(sc, VRC2_EXGPDATA, data);

sys/arch/hpcmips/vr/vrc4172gpio.c

521

write_4(sc, VRC2_EXGPDIR, reg);

sys/arch/hpcmips/vr/vrc4172gpio.c

529

write_4(sc, VRC2_EXGPINTTYP, reg);

sys/arch/hpcmips/vr/vrc4172gpio.c

554

write_4(sc, intlv_reg, reg);

sys/arch/hpcmips/vr/vrc4172gpio.c

570

write_4(sc, VRC2_EXGPINTEN, sc->sc_intr_mask);

sys/arch/hpcmips/vr/vrc4172gpio.c

596

write_4(sc, VRC2_EXGPINTEN,

sys/arch/hpcmips/vr/vrc4172gpio.c

614

write_4(sc, VRC2_EXGPINTST, 1 << ihe->ih_port);

sys/arch/hpcmips/vr/vrc4172gpio.c

615

write_4(sc, VRC2_EXGPINTST, 0);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1200

t->bs_w_4 = __BS(write_4);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1293

t->bs_ws_4 = __BS(write_4);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

852

__BS(write_4)(void *v, bus_space_handle_t h, bus_size_t off, uint32_t val)

sys/arch/riscv/starfive/jh7110_syscon.c

146

sc->sc_syscon.write_4 = jh7110_syscon_write_4;

sys/dev/fdt/syscon.c

134

sc->sc_syscon.write_4 = syscon_generic_write_4;

sys/dev/fdt/syscon.h

38

void (*write_4)(void *, bus_size_t, uint32_t);

sys/dev/fdt/syscon.h

51

(_syscon)->write_4((_syscon)->priv, (_reg), (_val))

sys/dev/ic/am79c930var.h

53

void (*write_4)(struct am79c930_softc *, u_int32_t, u_int32_t);

sys/dev/ic/awivar.h

132

((sc)->sc_chip.sc_ops->write_4)(&sc->sc_chip, off, val)

sys/dev/nor/cfi.c

150

.write_4 = cfi_write_4,

sys/dev/nor/nor.c

323

nor_if->write_4 = NULL;

sys/dev/nor/nor.h

115

void (*write_4) (device_t, flash_off_t, uint32_t);

sys/dev/nor/nor.h

233

KASSERT(sc->sc_nor_if->write_4 != NULL);

sys/dev/nor/nor.h

236

sc->sc_nor_if->write_4(sc->sc_controller_dev, offset, data);