sys/arch/sgimips/stand/common/iris_scsireg.h

410

#define SET_SBIC_myid(sc,val) wd33c93_write_reg(sc,SBIC_myid,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

412

#define SET_SBIC_cdbsize(sc,val) wd33c93_write_reg(sc,SBIC_cdbsize,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

414

#define SET_SBIC_control(sc,val) wd33c93_write_reg(sc,SBIC_control,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

416

#define SET_SBIC_timeo(sc,val) wd33c93_write_reg(sc,SBIC_timeo,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

418

#define SET_SBIC_cdb1(sc,val) wd33c93_write_reg(sc,SBIC_cdb1,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

420

#define SET_SBIC_cdb2(sc,val) wd33c93_write_reg(sc,SBIC_cdb2,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

422

#define SET_SBIC_cdb3(sc,val) wd33c93_write_reg(sc,SBIC_cdb3,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

424

#define SET_SBIC_cdb4(sc,val) wd33c93_write_reg(sc,SBIC_cdb4,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

426

#define SET_SBIC_cdb5(sc,val) wd33c93_write_reg(sc,SBIC_cdb5,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

428

#define SET_SBIC_cdb6(sc,val) wd33c93_write_reg(sc,SBIC_cdb6,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

430

#define SET_SBIC_cdb7(sc,val) wd33c93_write_reg(sc,SBIC_cdb7,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

432

#define SET_SBIC_cdb8(sc,val) wd33c93_write_reg(sc,SBIC_cdb8,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

434

#define SET_SBIC_cdb9(sc,val) wd33c93_write_reg(sc,SBIC_cdb9,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

436

#define SET_SBIC_cdb10(sc,val) wd33c93_write_reg(sc,SBIC_cdb10,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

438

#define SET_SBIC_cdb11(sc,val) wd33c93_write_reg(sc,SBIC_cdb11,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

440

#define SET_SBIC_cdb12(sc,val) wd33c93_write_reg(sc,SBIC_cdb12,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

442

#define SET_SBIC_tlun(sc,val) wd33c93_write_reg(sc,SBIC_tlun,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

444

#define SET_SBIC_cmd_phase(sc,val) wd33c93_write_reg(sc,SBIC_cmd_phase,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

446

#define SET_SBIC_syn(sc,val) wd33c93_write_reg(sc,SBIC_syn,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

448

#define SET_SBIC_count_hi(sc,val) wd33c93_write_reg(sc,SBIC_count_hi,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

450

#define SET_SBIC_count_med(sc,val) wd33c93_write_reg(sc,SBIC_count_med,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

452

#define SET_SBIC_count_lo(sc,val) wd33c93_write_reg(sc,SBIC_count_lo,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

454

#define SET_SBIC_selid(sc,val) wd33c93_write_reg(sc,SBIC_selid,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

456

#define SET_SBIC_rselid(sc,val) wd33c93_write_reg(sc,SBIC_rselid,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

458

#define SET_SBIC_csr(sc,val) wd33c93_write_reg(sc,SBIC_csr,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

460

#define SET_SBIC_cmd(sc,val) wd33c93_write_reg(sc,SBIC_cmd,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

462

#define SET_SBIC_data(sc,val) wd33c93_write_reg(sc,SBIC_data,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

464

#define SET_SBIC_queue_tag(sc,val) wd33c93_write_reg(sc,SBIC_queue_tag,val)

sys/arch/sgimips/stand/common/iris_scsireg.h

469

wd33c93_write_reg(sc, SBIC_count_hi, ((val) >> 16)); \

sys/dev/ic/wd33c93reg.h

391

#define SET_SBIC_myid(sc,val) wd33c93_write_reg(sc,SBIC_myid,val)

sys/dev/ic/wd33c93reg.h

393

#define SET_SBIC_cdbsize(sc,val) wd33c93_write_reg(sc,SBIC_cdbsize,val)

sys/dev/ic/wd33c93reg.h

395

#define SET_SBIC_control(sc,val) wd33c93_write_reg(sc,SBIC_control,val)

sys/dev/ic/wd33c93reg.h

397

#define SET_SBIC_timeo(sc,val) wd33c93_write_reg(sc,SBIC_timeo,val)

sys/dev/ic/wd33c93reg.h

399

#define SET_SBIC_cdb1(sc,val) wd33c93_write_reg(sc,SBIC_cdb1,val)

sys/dev/ic/wd33c93reg.h

401

#define SET_SBIC_cdb2(sc,val) wd33c93_write_reg(sc,SBIC_cdb2,val)

sys/dev/ic/wd33c93reg.h

403

#define SET_SBIC_cdb3(sc,val) wd33c93_write_reg(sc,SBIC_cdb3,val)

sys/dev/ic/wd33c93reg.h

405

#define SET_SBIC_cdb4(sc,val) wd33c93_write_reg(sc,SBIC_cdb4,val)

sys/dev/ic/wd33c93reg.h

407

#define SET_SBIC_cdb5(sc,val) wd33c93_write_reg(sc,SBIC_cdb5,val)

sys/dev/ic/wd33c93reg.h

409

#define SET_SBIC_cdb6(sc,val) wd33c93_write_reg(sc,SBIC_cdb6,val)

sys/dev/ic/wd33c93reg.h

411

#define SET_SBIC_cdb7(sc,val) wd33c93_write_reg(sc,SBIC_cdb7,val)

sys/dev/ic/wd33c93reg.h

413

#define SET_SBIC_cdb8(sc,val) wd33c93_write_reg(sc,SBIC_cdb8,val)

sys/dev/ic/wd33c93reg.h

415

#define SET_SBIC_cdb9(sc,val) wd33c93_write_reg(sc,SBIC_cdb9,val)

sys/dev/ic/wd33c93reg.h

417

#define SET_SBIC_cdb10(sc,val) wd33c93_write_reg(sc,SBIC_cdb10,val)

sys/dev/ic/wd33c93reg.h

419

#define SET_SBIC_cdb11(sc,val) wd33c93_write_reg(sc,SBIC_cdb11,val)

sys/dev/ic/wd33c93reg.h

421

#define SET_SBIC_cdb12(sc,val) wd33c93_write_reg(sc,SBIC_cdb12,val)

sys/dev/ic/wd33c93reg.h

423

#define SET_SBIC_tlun(sc,val) wd33c93_write_reg(sc,SBIC_tlun,val)

sys/dev/ic/wd33c93reg.h

425

#define SET_SBIC_cmd_phase(sc,val) wd33c93_write_reg(sc,SBIC_cmd_phase,val)

sys/dev/ic/wd33c93reg.h

427

#define SET_SBIC_syn(sc,val) wd33c93_write_reg(sc,SBIC_syn,val)

sys/dev/ic/wd33c93reg.h

429

#define SET_SBIC_count_hi(sc,val) wd33c93_write_reg(sc,SBIC_count_hi,val)

sys/dev/ic/wd33c93reg.h

431

#define SET_SBIC_count_med(sc,val) wd33c93_write_reg(sc,SBIC_count_med,val)

sys/dev/ic/wd33c93reg.h

433

#define SET_SBIC_count_lo(sc,val) wd33c93_write_reg(sc,SBIC_count_lo,val)

sys/dev/ic/wd33c93reg.h

435

#define SET_SBIC_selid(sc,val) wd33c93_write_reg(sc,SBIC_selid,val)

sys/dev/ic/wd33c93reg.h

437

#define SET_SBIC_rselid(sc,val) wd33c93_write_reg(sc,SBIC_rselid,val)

sys/dev/ic/wd33c93reg.h

439

#define SET_SBIC_csr(sc,val) wd33c93_write_reg(sc,SBIC_csr,val)

sys/dev/ic/wd33c93reg.h

441

#define SET_SBIC_cmd(sc,val) wd33c93_write_reg(sc,SBIC_cmd,val)

sys/dev/ic/wd33c93reg.h

443

#define SET_SBIC_data(sc,val) wd33c93_write_reg(sc,SBIC_data,val)

sys/dev/ic/wd33c93reg.h

445

#define SET_SBIC_queue_tag(sc,val) wd33c93_write_reg(sc,SBIC_queue_tag,val)

sys/dev/ic/wd33c93reg.h

450

wd33c93_write_reg(sc,SBIC_count_hi,((val)>>16)); \

sys/dev/ic/wd33c93reg.h

470

wd33c93_write_reg(regs, SBIC_cdb1, *ptr++); \