sys/arch/mips/atheros/dev/aevar.h

269

AE_WRITE((sc), (reg), AE_READ((sc), (reg)) | (mask))

sys/arch/mips/atheros/dev/aevar.h

272

AE_WRITE((sc), (reg), AE_READ((sc), (reg)) & ~(mask))

sys/arch/mips/atheros/dev/aevar.h

275

(AE_READ((sc), (reg)) & (mask))

sys/arch/mips/atheros/dev/if_ae.c

1674

macctl = AE_READ(sc, CSR_MACCTL);

sys/arch/mips/atheros/dev/if_ae.c

1774

csr = AE_READ(sc, CSR_STATUS);

sys/arch/mips/atheros/dev/if_ae.c

1828

macctl = AE_READ(sc, CSR_MACCTL);

sys/arch/mips/atheros/dev/if_ae.c

1868

if ((AE_READ(sc, CSR_MIIADDR) & MIIADDR_BUSY) == 0)

sys/arch/mips/atheros/dev/if_ae.c

1875

*val = AE_READ(sc, CSR_MIIDATA) & 0xffff;

sys/arch/mips/atheros/dev/if_ae.c

1901

if ((AE_READ(sc, CSR_MIIADDR) & MIIADDR_BUSY) == 0)

sys/arch/mips/atheros/dev/if_ae.c

868

status = AE_READ(sc, CSR_STATUS);

sys/arch/mips/atheros/dev/if_ae.c

913

opmode = AE_READ(sc, CSR_OPMODE);