lib/libc/citrus/modules/citrus_utf7.c
283
uint32_t u32;
lib/libc/citrus/modules/citrus_utf7.c
315
u32 = (uint32_t)hi;
lib/libc/citrus/modules/citrus_utf7.c
329
u32 = (hi << 10 | lo) + SRG_BASE;
lib/libc/citrus/modules/citrus_utf7.c
334
*pwc = (wchar_t)u32;
lib/libc/citrus/modules/citrus_utf7.c
335
if (u32 == (uint32_t)0) {
lib/libc/citrus/modules/citrus_utf7.c
415
uint32_t u32;
lib/libc/citrus/modules/citrus_utf7.c
427
u32 = (uint32_t)wchar;
lib/libc/citrus/modules/citrus_utf7.c
428
if (u32 <= UTF16_MAX) {
lib/libc/citrus/modules/citrus_utf7.c
429
u16[0] = (uint16_t)u32;
lib/libc/citrus/modules/citrus_utf7.c
431
} else if (u32 <= UTF32_MAX) {
lib/libc/citrus/modules/citrus_utf7.c
432
u32 -= SRG_BASE;
lib/libc/citrus/modules/citrus_utf7.c
433
u16[0] = (u32 >> 10) + HISRG_MIN;
lib/libc/citrus/modules/citrus_utf7.c
434
u16[1] = ((uint16_t)(u32 & UINT32_C(0x3ff))) + LOSRG_MIN;
lib/libc/resolv/res_init.c
761
uint32_t u32;
lib/libc/resolv/res_init.c
766
u32 = (uint32_t)now.tv_sec;
lib/libc/resolv/res_init.c
767
memcpy(rnd, &u32, 4);
lib/libc/resolv/res_init.c
768
u32 = now.tv_usec;
lib/libc/resolv/res_init.c
769
memcpy(rnd + 4, &u32, 4);
lib/libc/resolv/res_init.c
770
u32 += (uint32_t)now.tv_sec;
lib/libc/resolv/res_init.c
771
memcpy(rnd + 8, &u32, 4);
sbin/iscsid/iscsid_discover.c
109
uint32_t u32;
sbin/iscsid/iscsid_discover.c
178
u32 = ntohl(*((uint32_t *) data_p));
sbin/iscsid/iscsid_discover.c
179
if (!(u32 & 1)) {
sbin/iscsid/iscsid_discover.c
180
DEB(10,("iSNS Query returned bad type (type=%x, should be 1)", u32));
sbin/iscsid/iscsid_discover.c
270
u32 = ntohl(*((uint32_t *) data_p));
sbin/iscsid/iscsid_discover.c
271
if (u32 & 0xffff0000) {
sbin/iscsid/iscsid_discover.c
273
"should be 0)", u32 >> 16));
sbin/iscsid/iscsid_discover.c
277
addr.port = (uint16_t) u32;
sbin/iscsid/iscsid_discover.c
288
u32 = ntohl(*((uint32_t *) data_p));
sbin/iscsid/iscsid_discover.c
289
addr.group_tag = (uint16_t) u32;
sbin/iscsid/iscsid_discover.c
372
uint32_t u32;
sbin/iscsid/iscsid_discover.c
385
u32 = htonl(2);
sbin/iscsid/iscsid_discover.c
386
isns_add_tlv(t, isnst_EntProtocol, (uint32_t)sizeof(u32), &u32);
sbin/iscsid/iscsid_discover.c
392
u32 = htonl(2);
sbin/iscsid/iscsid_discover.c
393
isns_add_tlv(t, isnst_iSCSINodeType, (uint32_t)sizeof(u32), &u32);
sbin/iscsid/iscsid_discover.c
438
uint32_t *u32 = (uint32_t *)(void *)isns->reg_ip_addr;
sbin/iscsid/iscsid_discover.c
440
u32[0] = u32[1] = 0;
sbin/iscsid/iscsid_discover.c
441
u32[2] = htonl(0xffff);
sbin/iscsid/iscsid_discover.c
442
u32[3] = htonl(si->sin_addr.s_addr);
sbin/iscsid/iscsid_discover.c
578
uint32_t u32;
sbin/iscsid/iscsid_discover.c
656
u32 = ntohl(*((uint32_t *) data_p));
sbin/iscsid/iscsid_discover.c
659
if (u32 & 1)
sys/arch/arm/nvidia/tegra_drm.h
168
u32 tegra_drm_get_vblank_counter(struct drm_device *, unsigned int);
sys/arch/arm/nvidia/tegra_drm_mode.c
1302
u32
sys/arch/evbppc/nintendo/dev/gxreg.h
121
volatile uint32_t u32;
sys/arch/evbppc/nintendo/dev/wiifb.c
380
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = data);
sys/arch/evbppc/nintendo/dev/wiifb.c
388
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = data);
sys/arch/evbppc/nintendo/dev/wiifb.c
395
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = addr);
sys/arch/evbppc/nintendo/dev/wiifb.c
396
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = data);
sys/arch/evbppc/nintendo/dev/wiifb.c
406
GX_STRICT_ORDER(sc->sc_wgpipe->u32 =
sys/arch/evbppc/nintendo/dev/wiifb.c
409
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = data[n]);
sys/arch/evbppc/nintendo/dev/wiifb.c
570
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = 0);
sys/arch/evbppc/nintendo/dev/wiifb.c
571
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = 0);
sys/arch/evbppc/nintendo/dev/wiifb.c
572
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = 0);
sys/arch/evbppc/nintendo/dev/wiifb.c
573
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = 0);
sys/arch/evbppc/nintendo/dev/wiifb.c
574
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = 0);
sys/arch/evbppc/nintendo/dev/wiifb.c
575
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = 0);
sys/arch/evbppc/nintendo/dev/wiifb.c
576
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = 0);
sys/arch/evbppc/nintendo/dev/wiifb.c
577
GX_STRICT_ORDER(sc->sc_wgpipe->u32 = 0);
sys/arch/powerpc/powerpc/fix_unaligned.c
385
uint32_t u32;
sys/arch/powerpc/powerpc/fix_unaligned.c
395
ret = copyin(dear, &u32, sizeof(u32));
sys/arch/powerpc/powerpc/fix_unaligned.c
403
u32 = tf->tf_fixreg[rs];
sys/arch/powerpc/powerpc/fix_unaligned.c
405
u32 = bswap32(u32);
sys/arch/powerpc/powerpc/fix_unaligned.c
406
ret = copyout(&u32, dear, sizeof(u32));
sys/arch/powerpc/powerpc/fix_unaligned.c
419
bswap32(u32) : u32;
sys/arch/powerpc/powerpc/fix_unaligned.c
460
uint32_t u32;
sys/arch/powerpc/powerpc/fix_unaligned.c
473
ret = copyin(ea, &u32, size);
sys/arch/powerpc/powerpc/fix_unaligned.c
498
tf->tf_fixreg[r] = u32;
sys/arch/powerpc/powerpc/fix_unaligned.c
503
tf->tf_fixreg[r] = u32;
sys/dev/acpi/acpi_cpu.h
291
uint32_t u32;
sys/dev/acpi/acpi_cpu.h
303
AcpiOsReadPort(reg->reg_addr, &val.u32,
sys/dev/acpi/acpi_cpu.h
326
uint32_t u32;
sys/dev/acpi/acpi_cpu.h
338
AcpiOsReadPort(reg->reg_addr, &val.u32,
sys/dev/acpi/acpi_cpu.h
347
AcpiOsWritePort(reg->reg_addr, val.u32,
sys/dev/ic/apple_smc.c
370
union { uint32_t u32; char name[4]; } index_be;
sys/dev/ic/apple_smc.c
385
index_be.u32 = htobe32(index);
sys/dev/pci/cxgb/cxgb_ael1002.c
168
u32 val;
sys/dev/pci/cxgb/cxgb_common.h
124
u32 len[2];
sys/dev/pci/cxgb/cxgb_common.h
247
u32 ipInReceive_hi;
sys/dev/pci/cxgb/cxgb_common.h
248
u32 ipInReceive_lo;
sys/dev/pci/cxgb/cxgb_common.h
249
u32 ipInHdrErrors_hi;
sys/dev/pci/cxgb/cxgb_common.h
250
u32 ipInHdrErrors_lo;
sys/dev/pci/cxgb/cxgb_common.h
251
u32 ipInAddrErrors_hi;
sys/dev/pci/cxgb/cxgb_common.h
252
u32 ipInAddrErrors_lo;
sys/dev/pci/cxgb/cxgb_common.h
253
u32 ipInUnknownProtos_hi;
sys/dev/pci/cxgb/cxgb_common.h
254
u32 ipInUnknownProtos_lo;
sys/dev/pci/cxgb/cxgb_common.h
255
u32 ipInDiscards_hi;
sys/dev/pci/cxgb/cxgb_common.h
256
u32 ipInDiscards_lo;
sys/dev/pci/cxgb/cxgb_common.h
257
u32 ipInDelivers_hi;
sys/dev/pci/cxgb/cxgb_common.h
258
u32 ipInDelivers_lo;
sys/dev/pci/cxgb/cxgb_common.h
259
u32 ipOutRequests_hi;
sys/dev/pci/cxgb/cxgb_common.h
260
u32 ipOutRequests_lo;
sys/dev/pci/cxgb/cxgb_common.h
261
u32 ipOutDiscards_hi;
sys/dev/pci/cxgb/cxgb_common.h
262
u32 ipOutDiscards_lo;
sys/dev/pci/cxgb/cxgb_common.h
263
u32 ipOutNoRoutes_hi;
sys/dev/pci/cxgb/cxgb_common.h
264
u32 ipOutNoRoutes_lo;
sys/dev/pci/cxgb/cxgb_common.h
265
u32 ipReasmTimeout;
sys/dev/pci/cxgb/cxgb_common.h
266
u32 ipReasmReqds;
sys/dev/pci/cxgb/cxgb_common.h
267
u32 ipReasmOKs;
sys/dev/pci/cxgb/cxgb_common.h
268
u32 ipReasmFails;
sys/dev/pci/cxgb/cxgb_common.h
270
u32 reserved[8];
sys/dev/pci/cxgb/cxgb_common.h
272
u32 tcpActiveOpens;
sys/dev/pci/cxgb/cxgb_common.h
273
u32 tcpPassiveOpens;
sys/dev/pci/cxgb/cxgb_common.h
274
u32 tcpAttemptFails;
sys/dev/pci/cxgb/cxgb_common.h
275
u32 tcpEstabResets;
sys/dev/pci/cxgb/cxgb_common.h
276
u32 tcpOutRsts;
sys/dev/pci/cxgb/cxgb_common.h
277
u32 tcpCurrEstab;
sys/dev/pci/cxgb/cxgb_common.h
278
u32 tcpInSegs_hi;
sys/dev/pci/cxgb/cxgb_common.h
279
u32 tcpInSegs_lo;
sys/dev/pci/cxgb/cxgb_common.h
280
u32 tcpOutSegs_hi;
sys/dev/pci/cxgb/cxgb_common.h
281
u32 tcpOutSegs_lo;
sys/dev/pci/cxgb/cxgb_common.h
282
u32 tcpRetransSeg_hi;
sys/dev/pci/cxgb/cxgb_common.h
283
u32 tcpRetransSeg_lo;
sys/dev/pci/cxgb/cxgb_common.h
284
u32 tcpInErrs_hi;
sys/dev/pci/cxgb/cxgb_common.h
285
u32 tcpInErrs_lo;
sys/dev/pci/cxgb/cxgb_common.h
286
u32 tcpRtoMin;
sys/dev/pci/cxgb/cxgb_common.h
287
u32 tcpRtoMax;
sys/dev/pci/cxgb/cxgb_common.h
403
u32 sip;
sys/dev/pci/cxgb/cxgb_common.h
404
u32 sip_mask;
sys/dev/pci/cxgb/cxgb_common.h
405
u32 dip;
sys/dev/pci/cxgb/cxgb_common.h
406
u32 dip_mask;
sys/dev/pci/cxgb/cxgb_common.h
411
u32 vlan:12;
sys/dev/pci/cxgb/cxgb_common.h
412
u32 vlan_mask:12;
sys/dev/pci/cxgb/cxgb_common.h
413
u32 intf:4;
sys/dev/pci/cxgb/cxgb_common.h
414
u32 intf_mask:4;
sys/dev/pci/cxgb/cxgb_common.h
632
void t3_set_reg_field(adapter_t *adap, unsigned int addr, u32 mask, u32 val);
sys/dev/pci/cxgb/cxgb_common.h
635
int t3_wait_op_done_val(adapter_t *adapter, int reg, u32 mask, int polarity,
sys/dev/pci/cxgb/cxgb_common.h
636
int attempts, int delay, u32 *valp);
sys/dev/pci/cxgb/cxgb_common.h
638
static __inline int t3_wait_op_done(adapter_t *adapter, int reg, u32 mask,
sys/dev/pci/cxgb/cxgb_common.h
663
int t3_seeprom_read(adapter_t *adapter, u32 addr, u32 *data);
sys/dev/pci/cxgb/cxgb_common.h
664
int t3_seeprom_write(adapter_t *adapter, u32 addr, u32 data);
sys/dev/pci/cxgb/cxgb_common.h
667
u32 *data, int byte_oriented);
sys/dev/pci/cxgb/cxgb_common.h
668
int t3_get_tp_version(adapter_t *adapter, u32 *vers);
sys/dev/pci/cxgb/cxgb_common.h
672
int t3_get_fw_version(adapter_t *adapter, u32 *vers);
sys/dev/pci/cxgb/cxgb_common.h
674
int t3_init_hw(adapter_t *adapter, u32 fw_params);
sys/dev/pci/cxgb/cxgb_common.h
713
u32 *buf);
sys/dev/pci/cxgb/cxgb_common.h
756
int t3_sge_read_ecntxt(adapter_t *adapter, unsigned int id, u32 data[4]);
sys/dev/pci/cxgb/cxgb_common.h
757
int t3_sge_read_fl(adapter_t *adapter, unsigned int id, u32 data[4]);
sys/dev/pci/cxgb/cxgb_common.h
758
int t3_sge_read_cq(adapter_t *adapter, unsigned int id, u32 data[4]);
sys/dev/pci/cxgb/cxgb_common.h
759
int t3_sge_read_rspq(adapter_t *adapter, unsigned int id, u32 data[4]);
sys/dev/pci/cxgb/cxgb_common.h
763
int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n);
sys/dev/pci/cxgb/cxgb_common.h
764
int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n);
sys/dev/pci/cxgb/cxgb_jhash.h
117
static __inline u32 jhash_3words(u32 a, u32 b, u32 c, u32 initval)
sys/dev/pci/cxgb/cxgb_jhash.h
128
static __inline u32 jhash_2words(u32 a, u32 b, u32 initval)
sys/dev/pci/cxgb/cxgb_jhash.h
133
static __inline u32 jhash_1word(u32 a, u32 initval)
sys/dev/pci/cxgb/cxgb_jhash.h
39
static __inline u32 jhash(const void *key, u32 length, u32 initval)
sys/dev/pci/cxgb/cxgb_jhash.h
41
u32 a, b, c, len;
sys/dev/pci/cxgb/cxgb_jhash.h
49
a += (k[0] +((u32)k[1]<<8) +((u32)k[2]<<16) +((u32)k[3]<<24));
sys/dev/pci/cxgb/cxgb_jhash.h
50
b += (k[4] +((u32)k[5]<<8) +((u32)k[6]<<16) +((u32)k[7]<<24));
sys/dev/pci/cxgb/cxgb_jhash.h
51
c += (k[8] +((u32)k[9]<<8) +((u32)k[10]<<16)+((u32)k[11]<<24));
sys/dev/pci/cxgb/cxgb_jhash.h
61
case 11: c += ((u32)k[10]<<24);
sys/dev/pci/cxgb/cxgb_jhash.h
62
case 10: c += ((u32)k[9]<<16);
sys/dev/pci/cxgb/cxgb_jhash.h
63
case 9 : c += ((u32)k[8]<<8);
sys/dev/pci/cxgb/cxgb_jhash.h
64
case 8 : b += ((u32)k[7]<<24);
sys/dev/pci/cxgb/cxgb_jhash.h
65
case 7 : b += ((u32)k[6]<<16);
sys/dev/pci/cxgb/cxgb_jhash.h
66
case 6 : b += ((u32)k[5]<<8);
sys/dev/pci/cxgb/cxgb_jhash.h
68
case 4 : a += ((u32)k[3]<<24);
sys/dev/pci/cxgb/cxgb_jhash.h
69
case 3 : a += ((u32)k[2]<<16);
sys/dev/pci/cxgb/cxgb_jhash.h
70
case 2 : a += ((u32)k[1]<<8);
sys/dev/pci/cxgb/cxgb_jhash.h
82
static __inline u32 jhash2(u32 *k, u32 length, u32 initval)
sys/dev/pci/cxgb/cxgb_jhash.h
84
u32 a, b, c, len;
sys/dev/pci/cxgb/cxgb_l2t.c
350
u32 addr = ((struct sockaddr_in *)rt_getkey(neigh))->sin_addr.s_addr;
sys/dev/pci/cxgb/cxgb_l2t.c
431
u32 addr = ((struct sockaddr_in *)rt_getkey(neigh))->sin_addr.s_addr;
sys/dev/pci/cxgb/cxgb_l2t.c
480
u32 addr = *(u32 *) rt_key(neigh);
sys/dev/pci/cxgb/cxgb_l2t.c
81
arp_hash(u32 key, int ifindex, const struct l2t_data *d)
sys/dev/pci/cxgb/cxgb_lro.c
140
uint32_t *ptr = (u32 *)(th + 1);
sys/dev/pci/cxgb/cxgb_main.c
159
u32 sip;
sys/dev/pci/cxgb/cxgb_main.c
160
u32 sip_mask;
sys/dev/pci/cxgb/cxgb_main.c
161
u32 dip;
sys/dev/pci/cxgb/cxgb_main.c
164
u32 vlan:12;
sys/dev/pci/cxgb/cxgb_main.c
165
u32 vlan_prio:3;
sys/dev/pci/cxgb/cxgb_main.c
166
u32 mac_hit:1;
sys/dev/pci/cxgb/cxgb_main.c
1667
u32 v;
sys/dev/pci/cxgb/cxgb_main.c
167
u32 mac_idx:4;
sys/dev/pci/cxgb/cxgb_main.c
168
u32 mac_vld:1;
sys/dev/pci/cxgb/cxgb_main.c
169
u32 pkt_type:2;
sys/dev/pci/cxgb/cxgb_main.c
170
u32 report_filter_id:1;
sys/dev/pci/cxgb/cxgb_main.c
171
u32 pass:1;
sys/dev/pci/cxgb/cxgb_main.c
172
u32 rss:1;
sys/dev/pci/cxgb/cxgb_main.c
173
u32 qset:3;
sys/dev/pci/cxgb/cxgb_main.c
174
u32 locked:1;
sys/dev/pci/cxgb/cxgb_main.c
175
u32 valid:1;
sys/dev/pci/cxgb/cxgb_mc5.c
106
static inline void dbgi_wr_addr3(adapter_t *adapter, u32 v1, u32 v2, u32 v3)
sys/dev/pci/cxgb/cxgb_mc5.c
113
static inline void dbgi_wr_data3(adapter_t *adapter, u32 v1, u32 v2, u32 v3)
sys/dev/pci/cxgb/cxgb_mc5.c
120
static inline void dbgi_rd_rsp3(adapter_t *adapter, u32 *v1, u32 *v2, u32 *v3)
sys/dev/pci/cxgb/cxgb_mc5.c
132
static int mc5_write(adapter_t *adapter, u32 addr_lo, u32 cmd)
sys/dev/pci/cxgb/cxgb_mc5.c
141
static int init_mask_data_array(struct mc5 *mc5, u32 mask_array_base,
sys/dev/pci/cxgb/cxgb_mc5.c
142
u32 data_array_base, u32 write_cmd,
sys/dev/pci/cxgb/cxgb_mc5.c
397
unsigned int n, u32 *buf)
sys/dev/pci/cxgb/cxgb_mc5.c
399
u32 read_cmd;
sys/dev/pci/cxgb/cxgb_mc5.c
434
u32 cause = t3_read_reg(adap, A_MC5_DB_INT_CAUSE);
sys/dev/pci/cxgb/cxgb_mc5.c
475
u32 cfg = t3_read_reg(adapter, A_MC5_DB_CONFIG);
sys/dev/pci/cxgb/cxgb_mc5.c
99
static int mc5_cmd_write(adapter_t *adapter, u32 cmd)
sys/dev/pci/cxgb/cxgb_mv88e1xxx.c
158
u32 val;
sys/dev/pci/cxgb/cxgb_mv88e1xxx.c
195
u32 status;
sys/dev/pci/cxgb/cxgb_mv88e1xxx.c
243
const u32 link_change_intrs = MV_INTR_LINK_CHNG |
sys/dev/pci/cxgb/cxgb_mv88e1xxx.c
247
u32 cause;
sys/dev/pci/cxgb/cxgb_offload.c
1020
u8 new, u32 flags)
sys/dev/pci/cxgb/cxgb_offload.c
1188
set_l2t_ix(struct toedev *tdev, u32 tid, struct l2t_entry *e)
sys/dev/pci/cxgb/cxgb_offload.c
1217
u32 tid;
sys/dev/pci/cxgb/cxgb_t3_hw.c
1029
u32 csum;
sys/dev/pci/cxgb/cxgb_t3_hw.c
1031
const u32 *p = (const u32 *)fw_data;
sys/dev/pci/cxgb/cxgb_t3_hw.c
106
void t3_set_reg_field(adapter_t *adapter, unsigned int addr, u32 mask, u32 val)
sys/dev/pci/cxgb/cxgb_t3_hw.c
108
u32 v = t3_read_reg(adapter, addr) & ~mask;
sys/dev/pci/cxgb/cxgb_t3_hw.c
127
unsigned int data_reg, u32 *vals, unsigned int nregs,
sys/dev/pci/cxgb/cxgb_t3_hw.c
1537
u32 cause = t3_read_reg(adapter, mc7->offset + A_MC7_INT_CAUSE);
sys/dev/pci/cxgb/cxgb_t3_hw.c
1566
u32 addr = 0;
sys/dev/pci/cxgb/cxgb_t3_hw.c
1589
u32 cause;
sys/dev/pci/cxgb/cxgb_t3_hw.c
1626
u32 mask, gpi = adapter_info(adapter)->gpio_intr;
sys/dev/pci/cxgb/cxgb_t3_hw.c
1627
u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE);
sys/dev/pci/cxgb/cxgb_t3_hw.c
166
u32 val;
sys/dev/pci/cxgb/cxgb_t3_hw.c
1662
u32 cause = t3_read_reg(adapter, A_PL_INT_CAUSE0);
sys/dev/pci/cxgb/cxgb_t3_hw.c
1925
V_EC_BASE_LO((u32)base_addr & 0xffff));
sys/dev/pci/cxgb/cxgb_t3_hw.c
1927
t3_write_reg(adapter, A_SG_CONTEXT_DATA2, (u32)base_addr);
sys/dev/pci/cxgb/cxgb_t3_hw.c
1930
V_EC_BASE_HI((u32)base_addr & 0xf) | V_EC_RESPQ(respq) |
sys/dev/pci/cxgb/cxgb_t3_hw.c
1962
t3_write_reg(adapter, A_SG_CONTEXT_DATA0, (u32)base_addr);
sys/dev/pci/cxgb/cxgb_t3_hw.c
1965
V_FL_BASE_HI((u32)base_addr) |
sys/dev/pci/cxgb/cxgb_t3_hw.c
200
u32 clkdiv = adap->params.vpd.cclk / (2 * adap->params.vpd.mdc) - 1;
sys/dev/pci/cxgb/cxgb_t3_hw.c
2005
t3_write_reg(adapter, A_SG_CONTEXT_DATA1, (u32)base_addr);
sys/dev/pci/cxgb/cxgb_t3_hw.c
201
u32 val = F_PREEN | V_MDIINV(ai->mdiinv) | V_MDIEN(ai->mdien) |
sys/dev/pci/cxgb/cxgb_t3_hw.c
2010
V_CQ_BASE_HI((u32)base_addr) | intr | V_RQ_GEN(gen));
sys/dev/pci/cxgb/cxgb_t3_hw.c
2041
t3_write_reg(adapter, A_SG_CONTEXT_DATA1, (u32)base_addr);
sys/dev/pci/cxgb/cxgb_t3_hw.c
2044
V_CQ_BASE_HI((u32)base_addr) | V_CQ_RSPQ(rspq) |
sys/dev/pci/cxgb/cxgb_t3_hw.c
2166
u32 val;
sys/dev/pci/cxgb/cxgb_t3_hw.c
218
u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
sys/dev/pci/cxgb/cxgb_t3_hw.c
2204
unsigned int id, u32 data[4])
sys/dev/pci/cxgb/cxgb_t3_hw.c
2230
int t3_sge_read_ecntxt(adapter_t *adapter, unsigned int id, u32 data[4])
sys/dev/pci/cxgb/cxgb_t3_hw.c
2246
int t3_sge_read_cq(adapter_t *adapter, unsigned int id, u32 data[4])
sys/dev/pci/cxgb/cxgb_t3_hw.c
2262
int t3_sge_read_fl(adapter_t *adapter, unsigned int id, u32 data[4])
sys/dev/pci/cxgb/cxgb_t3_hw.c
2278
int t3_sge_read_rspq(adapter_t *adapter, unsigned int id, u32 data[4])
sys/dev/pci/cxgb/cxgb_t3_hw.c
2304
u32 val = i << 16;
sys/dev/pci/cxgb/cxgb_t3_hw.c
2336
u32 val;
sys/dev/pci/cxgb/cxgb_t3_hw.c
237
u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
sys/dev/pci/cxgb/cxgb_t3_hw.c
2525
static inline void tp_wr_indirect(adapter_t *adap, unsigned int addr, u32 val)
sys/dev/pci/cxgb/cxgb_t3_hw.c
263
u32 addr = V_REGADDR(mmd_addr) | V_PHYADDR(phy_addr);
sys/dev/pci/cxgb/cxgb_t3_hw.c
2649
u32 val;
sys/dev/pci/cxgb/cxgb_t3_hw.c
285
u32 addr = V_REGADDR(mmd_addr) | V_PHYADDR(phy_addr);
sys/dev/pci/cxgb/cxgb_t3_hw.c
2850
t3_read_indirect(adap, A_TP_MIB_INDEX, A_TP_MIB_RDATA, (u32 *)tps,
sys/dev/pci/cxgb/cxgb_t3_hw.c
2851
sizeof(*tps) / sizeof(u32), 0);
sys/dev/pci/cxgb/cxgb_t3_hw.c
2926
const u32 *buf = (const u32 *)data;
sys/dev/pci/cxgb/cxgb_t3_hw.c
2956
u32 addr, key[4], mask[4];
sys/dev/pci/cxgb/cxgb_t3_hw.c
3244
static int wrreg_wait(adapter_t *adapter, unsigned int addr, u32 val)
sys/dev/pci/cxgb/cxgb_t3_hw.c
3267
u32 val;
sys/dev/pci/cxgb/cxgb_t3_hw.c
3434
int t3_init_hw(adapter_t *adapter, u32 fw_params)
sys/dev/pci/cxgb/cxgb_t3_hw.c
3510
u32 pcie_mode, pcie_cap;
sys/dev/pci/cxgb/cxgb_t3_hw.c
3571
static unsigned int __devinit mc7_calc_size(u32 cfg)
sys/dev/pci/cxgb/cxgb_t3_hw.c
3585
u32 cfg;
sys/dev/pci/cxgb/cxgb_t3_hw.c
3627
u32 val = V_PORTSPEED(is_10G(adapter) || adapter->params.nports > 2 ?
sys/dev/pci/cxgb/cxgb_t3_hw.c
3811
u32 val;
sys/dev/pci/cxgb/cxgb_t3_hw.c
531
u32 pad; /* for multiple-of-4 sizing and alignment */
sys/dev/pci/cxgb/cxgb_t3_hw.c
549
int t3_seeprom_read(adapter_t *adapter, u32 addr, u32 *data)
sys/dev/pci/cxgb/cxgb_t3_hw.c
58
int t3_wait_op_done_val(adapter_t *adapter, int reg, u32 mask, int polarity,
sys/dev/pci/cxgb/cxgb_t3_hw.c
582
int t3_seeprom_write(adapter_t *adapter, u32 addr, u32 data)
sys/dev/pci/cxgb/cxgb_t3_hw.c
59
int attempts, int delay, u32 *valp)
sys/dev/pci/cxgb/cxgb_t3_hw.c
62
u32 val = t3_read_reg(adapter, reg);
sys/dev/pci/cxgb/cxgb_t3_hw.c
643
ret = t3_seeprom_read(adapter, VPD_BASE, (u32 *)&vpd);
sys/dev/pci/cxgb/cxgb_t3_hw.c
650
(u32 *)((u8 *)&vpd + i));
sys/dev/pci/cxgb/cxgb_t3_hw.c
712
u32 *valp)
sys/dev/pci/cxgb/cxgb_t3_hw.c
739
u32 val)
sys/dev/pci/cxgb/cxgb_t3_hw.c
762
u32 status;
sys/dev/pci/cxgb/cxgb_t3_hw.c
791
u32 *data, int byte_oriented)
sys/dev/pci/cxgb/cxgb_t3_hw.c
795
if (addr + nwords * sizeof(u32) > SF_SIZE || (addr & 3))
sys/dev/pci/cxgb/cxgb_t3_hw.c
828
u32 buf[64];
sys/dev/pci/cxgb/cxgb_t3_hw.c
869
int t3_get_tp_version(adapter_t *adapter, u32 *vers)
sys/dev/pci/cxgb/cxgb_t3_hw.c
893
u32 vers;
sys/dev/pci/cxgb/cxgb_t3_hw.c
929
u32 csum;
sys/dev/pci/cxgb/cxgb_t3_hw.c
931
const u32 *p = (const u32 *)tp_sram;
sys/dev/pci/cxgb/cxgb_t3_hw.c
957
int t3_get_fw_version(adapter_t *adapter, u32 *vers)
sys/dev/pci/cxgb/cxgb_t3_hw.c
972
u32 vers;
sys/dev/pci/cxgb/cxgb_vsc7323.c
294
u32 stats0[NSTATS0], stats1[NSTATS1];
sys/dev/pci/cxgb/cxgb_vsc7323.c
311
rx_ucast += (u64)(stats0[6 - STATS0_START] - (u32)rx_ucast);
sys/dev/pci/cxgb/cxgb_vsc7323.c
314
tx_ucast += (u64)(stats0[27 - STATS0_START] - (u32)tx_ucast);
sys/dev/pci/cxgb/cxgb_vsc7323.c
317
mac->stats.name += (u64)((hw_stat) - (u32)(mac->stats.name))
sys/dev/pci/cxgb/cxgb_vsc7323.c
57
int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n)
sys/dev/pci/cxgb/cxgb_vsc7323.c
75
static int elmr_write(adapter_t *adap, int addr, u32 val)
sys/dev/pci/cxgb/cxgb_vsc7323.c
80
int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n)
sys/dev/pci/cxgb/cxgb_vsc8211.c
102
u32 val;
sys/dev/pci/cxgb/cxgb_xgmac.c
106
u32 val;
sys/dev/pci/cxgb/cxgb_xgmac.c
170
u32 val;
sys/dev/pci/cxgb/cxgb_xgmac.c
229
u32 addr_lo, addr_hi;
sys/dev/pci/cxgb/cxgb_xgmac.c
270
u32 v = t3_read_reg(mac->adapter, reg);
sys/dev/pci/cxgb/cxgb_xgmac.c
281
u32 v = t3_read_reg(mac->adapter, reg);
sys/dev/pci/cxgb/cxgb_xgmac.c
303
u32 hash_lo, hash_hi;
sys/dev/pci/cxgb/cxgb_xgmac.c
424
u32 val;
sys/dev/pci/cxgb/cxgb_xgmac.c
63
u32 ctrl = A_XGM_SERDES_CTRL0 + mac->offset;
sys/dev/pci/cxgb/cxgb_xgmac.c
640
u32 v, lo;
sys/dev/pci/cxgb/cxgb_xgmac.c
689
lo = (u32)mac->stats.rx_cong_drops;
sys/dev/pci/if_ena.c
2673
u32 mss;
sys/dev/pci/if_ena.c
2685
u32 mss = mbuf->m_pkthdr.tso_segsz;
sys/dev/pci/if_mcx.c
3238
mcx_mix_u32(uint32_t xor, uint32_t u32)
sys/dev/pci/if_mcx.c
3240
xor ^= u32;
sys/dev/pci/ixgbe/if_bypass.c
126
u32 cmd;
sys/dev/pci/ixgbe/if_bypass.c
458
u32 mask, arg;
sys/dev/pci/ixgbe/if_bypass.c
529
u32 sec, year;
sys/dev/pci/ixgbe/if_bypass.c
578
u32 cmd, base, head;
sys/dev/pci/ixgbe/if_bypass.c
579
u32 log_off, count = 0;
sys/dev/pci/ixgbe/if_bypass.c
661
u32 mon, days, hours, min, sec;
sys/dev/pci/ixgbe/if_bypass.c
662
u32 time = eeprom[count].logs & BYPASS_LOG_TIME_M;
sys/dev/pci/ixgbe/if_bypass.c
663
u32 event = (eeprom[count].logs & BYPASS_LOG_EVENT_M) >>
sys/dev/pci/ixgbe/if_bypass.c
744
u32 mask, value, sec, year;
sys/dev/pci/ixgbe/if_bypass.c
99
ixgbe_get_bypass_time(u32 *year, u32 *sec)
sys/dev/pci/ixgbe/if_fdir.c
46
u32 hdrm = 32 << fdir_pballoc;
sys/dev/pci/ixgbe/if_sriov.c
106
ixgbe_send_vf_ack(struct ixgbe_softc *sc, struct ixgbe_vf *vf, u32 msg)
sys/dev/pci/ixgbe/if_sriov.c
113
ixgbe_send_vf_nack(struct ixgbe_softc *sc, struct ixgbe_vf *vf, u32 msg)
sys/dev/pci/ixgbe/if_sriov.c
159
inline u32
sys/dev/pci/ixgbe/if_sriov.c
162
u32 mrqc;
sys/dev/pci/ixgbe/if_sriov.c
182
inline u32
sys/dev/pci/ixgbe/if_sriov.c
429
ixgbe_vf_set_mc_addr(struct ixgbe_softc *sc, struct ixgbe_vf *vf, u32 *msg)
sys/dev/pci/ixgbe/if_sriov.c
433
u32 vmolr, vec_bit, vec_reg, mta_reg;
sys/dev/pci/ixgbe/if_sriov.c
97
ixgbe_send_vf_msg(struct ixgbe_hw *hw, struct ixgbe_vf *vf, u32 msg)
sys/dev/pci/ixgbe/ix_txrx.c
1005
u32 vlan_macip_lens = 0;
sys/dev/pci/ixgbe/ix_txrx.c
1006
u32 type_tucmd_mlhl = 0;
sys/dev/pci/ixgbe/ix_txrx.c
1007
u32 mss_l4len_idx = 0, paylen;
sys/dev/pci/ixgbe/ix_txrx.c
1117
u32 work, processed = 0;
sys/dev/pci/ixgbe/ix_txrx.c
1118
u32 limit = sc->tx_process_limit;
sys/dev/pci/ixgbe/ix_txrx.c
114
static void ixgbe_rx_checksum(u32, struct mbuf *, u32,
sys/dev/pci/ixgbe/ix_txrx.c
120
struct mbuf *, u32 *, u32 *);
sys/dev/pci/ixgbe/ix_txrx.c
122
struct mbuf *, u32 *, u32 *);
sys/dev/pci/ixgbe/ix_txrx.c
125
struct mbuf *, u32);
sys/dev/pci/ixgbe/ix_txrx.c
1270
static inline u32
sys/dev/pci/ixgbe/ix_txrx.c
1293
u32 rscctrl, rdrxctl;
sys/dev/pci/ixgbe/ix_txrx.c
1735
u32 ptype)
sys/dev/pci/ixgbe/ix_txrx.c
1829
u32 staterr = 0;
sys/dev/pci/ixgbe/ix_txrx.c
1830
u32 loopcount = 0, numdesc;
sys/dev/pci/ixgbe/ix_txrx.c
1831
u32 limit = sc->rx_process_limit;
sys/dev/pci/ixgbe/ix_txrx.c
1832
u32 rx_copy_len = sc->rx_copy_len;
sys/dev/pci/ixgbe/ix_txrx.c
1881
u32 rsc;
sys/dev/pci/ixgbe/ix_txrx.c
1883
u32 ptype;
sys/dev/pci/ixgbe/ix_txrx.c
2224
ixgbe_rx_checksum(u32 staterr, struct mbuf * mp, u32 ptype,
sys/dev/pci/ixgbe/ix_txrx.c
420
u32 olinfo_status = 0, cmd_type_len;
sys/dev/pci/ixgbe/ix_txrx.c
829
u32 *cmd_type_len, u32 *olinfo_status)
sys/dev/pci/ixgbe/ix_txrx.c
843
u32 vlan_macip_lens = 0;
sys/dev/pci/ixgbe/ix_txrx.c
844
u32 type_tucmd_mlhl = 0;
sys/dev/pci/ixgbe/ix_txrx.c
992
ixgbe_tso_setup(struct tx_ring *txr, struct mbuf *mp, u32 *cmd_type_len,
sys/dev/pci/ixgbe/ix_txrx.c
993
u32 *olinfo_status)
sys/dev/pci/ixgbe/ixgbe.c
1569
u32 autoneg, err = 0;
sys/dev/pci/ixgbe/ixgbe.c
1570
u32 task_requests = 0;
sys/dev/pci/ixgbe/ixgbe.c
1621
u32 missed_rx = 0, bprc, lxontxc, lxofftxc;
sys/dev/pci/ixgbe/ixgbe.c
180
static int ixgbe_check_fan_failure(struct ixgbe_softc *, u32, bool);
sys/dev/pci/ixgbe/ixgbe.c
224
static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
sys/dev/pci/ixgbe/ixgbe.c
2469
sc->shadow_vfta[index] |= ((u32)1 << bit);
sys/dev/pci/ixgbe/ixgbe.c
2496
sc->shadow_vfta[index] &= ~((u32)1 << bit);
sys/dev/pci/ixgbe/ixgbe.c
2512
u32 ctrl;
sys/dev/pci/ixgbe/ixgbe.c
2554
u32 ctrl;
sys/dev/pci/ixgbe/ixgbe.c
2582
sc->shadow_vfta[idx] |= (u32)1 << (vlanidp->vid % 32);
sys/dev/pci/ixgbe/ixgbe.c
2608
u32 offset;
sys/dev/pci/ixgbe/ixgbe.c
268
static void ixgbe_intr_admin_common(struct ixgbe_softc *, u32, u32 *);
sys/dev/pci/ixgbe/ixgbe.c
2711
ixgbe_enable_queue(struct ixgbe_softc *sc, u32 vector)
sys/dev/pci/ixgbe/ixgbe.c
2716
u32 mask;
sys/dev/pci/ixgbe/ixgbe.c
2741
ixgbe_disable_queue_internal(struct ixgbe_softc *sc, u32 vector, bool nestok)
sys/dev/pci/ixgbe/ixgbe.c
2746
u32 mask;
sys/dev/pci/ixgbe/ixgbe.c
2776
ixgbe_disable_queue(struct ixgbe_softc *sc, u32 vector)
sys/dev/pci/ixgbe/ixgbe.c
2822
u32 newitr = 0;
sys/dev/pci/ixgbe/ixgbe.c
3155
u32 eicr;
sys/dev/pci/ixgbe/ixgbe.c
3156
u32 eims_orig;
sys/dev/pci/ixgbe/ixgbe.c
3157
u32 eims_disable = 0;
sys/dev/pci/ixgbe/ixgbe.c
3188
ixgbe_intr_admin_common(struct ixgbe_softc *sc, u32 eicr, u32 *eims_disable)
sys/dev/pci/ixgbe/ixgbe.c
3191
u32 task_requests = 0;
sys/dev/pci/ixgbe/ixgbe.c
3201
u32 eicr_mask;
sys/dev/pci/ixgbe/ixgbe.c
3705
u32 ctrl_ext;
sys/dev/pci/ixgbe/ixgbe.c
3926
IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2);
sys/dev/pci/ixgbe/ixgbe.c
3997
u32 wus;
sys/dev/pci/ixgbe/ixgbe.c
4056
u32 txdctl, mhadd;
sys/dev/pci/ixgbe/ixgbe.c
4057
u32 rxdctl, rxctrl;
sys/dev/pci/ixgbe/ixgbe.c
4058
u32 ctrl_ext;
sys/dev/pci/ixgbe/ixgbe.c
425
u32 reta = 0, mrqc, rss_key[10];
sys/dev/pci/ixgbe/ixgbe.c
428
u32 rss_hash_config;
sys/dev/pci/ixgbe/ixgbe.c
4338
u32 ivar, index;
sys/dev/pci/ixgbe/ixgbe.c
4351
ivar |= ((u32)vector << (8 * (entry & 0x3)));
sys/dev/pci/ixgbe/ixgbe.c
4363
ivar |= ((u32)vector << index);
sys/dev/pci/ixgbe/ixgbe.c
4369
ivar |= ((u32)vector << index);
sys/dev/pci/ixgbe/ixgbe.c
4385
u32 newitr;
sys/dev/pci/ixgbe/ixgbe.c
4427
u32 gpie;
sys/dev/pci/ixgbe/ixgbe.c
4473
u32 rxpb, frame, size, tmp;
sys/dev/pci/ixgbe/ixgbe.c
4523
u32 fctrl;
sys/dev/pci/ixgbe/ixgbe.c
4580
ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)
sys/dev/pci/ixgbe/ixgbe.c
4798
u32 err;
sys/dev/pci/ixgbe/ixgbe.c
4887
u32 autoneg;
sys/dev/pci/ixgbe/ixgbe.c
4930
u32 task_requests;
sys/dev/pci/ixgbe/ixgbe.c
4931
u32 eims_enable = 0;
sys/dev/pci/ixgbe/ixgbe.c
5174
u32 mask, fwsm;
sys/dev/pci/ixgbe/ixgbe.c
5301
u32 eicr;
sys/dev/pci/ixgbe/ixgbe.c
5302
u32 eims_orig;
sys/dev/pci/ixgbe/ixgbe.c
5303
u32 eims_enable = 0;
sys/dev/pci/ixgbe/ixgbe.c
5304
u32 eims_disable = 0;
sys/dev/pci/ixgbe/ixgbe.c
547
u32 bufsz, fctrl, srrctl, rxcsum;
sys/dev/pci/ixgbe/ixgbe.c
548
u32 hlreg;
sys/dev/pci/ixgbe/ixgbe.c
5490
u32 srrctl;
sys/dev/pci/ixgbe/ixgbe.c
5515
u32 srrctl;
sys/dev/pci/ixgbe/ixgbe.c
5885
u32 new_wufc;
sys/dev/pci/ixgbe/ixgbe.c
589
u32 reg;
sys/dev/pci/ixgbe/ixgbe.c
5923
u32 reg;
sys/dev/pci/ixgbe/ixgbe.c
637
u32 psrtype = IXGBE_PSRTYPE_TCPHDR
sys/dev/pci/ixgbe/ixgbe.c
6662
ixgbe_check_fan_failure(struct ixgbe_softc *sc, u32 reg, bool in_interrupt)
sys/dev/pci/ixgbe/ixgbe.c
6664
u32 mask;
sys/dev/pci/ixgbe/ixgbe.c
679
u32 txctrl = 0;
sys/dev/pci/ixgbe/ixgbe.c
680
u32 tqsmreg, reg;
sys/dev/pci/ixgbe/ixgbe.c
7188
u32 mask;
sys/dev/pci/ixgbe/ixgbe.c
740
u32 dmatxctl, rttdcs;
sys/dev/pci/ixgbe/ixgbe.c
798
u32 ctrl_ext;
sys/dev/pci/ixgbe/ixgbe.c
944
u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
sys/dev/pci/ixgbe/ixgbe.h
283
u32 low;
sys/dev/pci/ixgbe/ixgbe.h
284
u32 high;
sys/dev/pci/ixgbe/ixgbe.h
285
u32 log;
sys/dev/pci/ixgbe/ixgbe.h
317
u32 vmdq;
sys/dev/pci/ixgbe/ixgbe.h
326
u32 msix; /* This queue's MSI-X vector */
sys/dev/pci/ixgbe/ixgbe.h
327
u32 eitr_setting;
sys/dev/pci/ixgbe/ixgbe.h
361
u32 tail;
sys/dev/pci/ixgbe/ixgbe.h
411
u32 tail;
sys/dev/pci/ixgbe/ixgbe.h
500
u32 shadow_vfta[IXGBE_VFTA_SIZE];
sys/dev/pci/ixgbe/ixgbe.h
509
u32 link_speed;
sys/dev/pci/ixgbe/ixgbe.h
512
u32 vector;
sys/dev/pci/ixgbe/ixgbe.h
514
u32 phy_layer;
sys/dev/pci/ixgbe/ixgbe.h
518
u32 wufc;
sys/dev/pci/ixgbe/ixgbe.h
521
u32 rx_mbuf_sz;
sys/dev/pci/ixgbe/ixgbe.h
532
volatile u32 task_requests;
sys/dev/pci/ixgbe/ixgbe.h
567
u32 num_tx_desc;
sys/dev/pci/ixgbe/ixgbe.h
568
u32 tx_process_limit;
sys/dev/pci/ixgbe/ixgbe.h
576
u32 num_rx_desc;
sys/dev/pci/ixgbe/ixgbe.h
577
u32 rx_process_limit;
sys/dev/pci/ixgbe/ixgbe.h
578
u32 rx_copy_len;
sys/dev/pci/ixgbe/ixgbe.h
637
u32 feat_cap;
sys/dev/pci/ixgbe/ixgbe.h
638
u32 feat_en;
sys/dev/pci/ixgbe/ixgbe_82598.c
1009
s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/pci/ixgbe/ixgbe_82598.c
1012
u32 regindex;
sys/dev/pci/ixgbe/ixgbe_82598.c
1013
u32 bitindex;
sys/dev/pci/ixgbe/ixgbe_82598.c
1014
u32 bits;
sys/dev/pci/ixgbe/ixgbe_82598.c
1015
u32 vftabyte;
sys/dev/pci/ixgbe/ixgbe_82598.c
1060
u32 offset;
sys/dev/pci/ixgbe/ixgbe_82598.c
1061
u32 vlanbyte;
sys/dev/pci/ixgbe/ixgbe_82598.c
1084
s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val)
sys/dev/pci/ixgbe/ixgbe_82598.c
1086
u32 atlas_ctl;
sys/dev/pci/ixgbe/ixgbe_82598.c
1108
s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val)
sys/dev/pci/ixgbe/ixgbe_82598.c
1110
u32 atlas_ctl;
sys/dev/pci/ixgbe/ixgbe_82598.c
1139
u32 i;
sys/dev/pci/ixgbe/ixgbe_82598.c
1235
u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
sys/dev/pci/ixgbe/ixgbe_82598.c
1236
u32 pma_pmd_10g = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK;
sys/dev/pci/ixgbe/ixgbe_82598.c
1237
u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
sys/dev/pci/ixgbe/ixgbe_82598.c
1369
u32 regval;
sys/dev/pci/ixgbe/ixgbe_82598.c
1370
u32 i;
sys/dev/pci/ixgbe/ixgbe_82598.c
1400
u32 headroom, int strategy)
sys/dev/pci/ixgbe/ixgbe_82598.c
1402
u32 rxpktsize = IXGBE_RXPBSIZE_64KB;
sys/dev/pci/ixgbe/ixgbe_82598.c
1439
s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval)
sys/dev/pci/ixgbe/ixgbe_82598.c
262
u32 regval;
sys/dev/pci/ixgbe/ixgbe_82598.c
263
u32 i;
sys/dev/pci/ixgbe/ixgbe_82598.c
307
u32 autoc = 0;
sys/dev/pci/ixgbe/ixgbe_82598.c
417
u32 fctrl_reg;
sys/dev/pci/ixgbe/ixgbe_82598.c
418
u32 rmcs_reg;
sys/dev/pci/ixgbe/ixgbe_82598.c
419
u32 reg;
sys/dev/pci/ixgbe/ixgbe_82598.c
420
u32 fcrtl, fcrth;
sys/dev/pci/ixgbe/ixgbe_82598.c
421
u32 link_speed = 0;
sys/dev/pci/ixgbe/ixgbe_82598.c
544
reg = (u32)hw->fc.pause_time * 0x00010001;
sys/dev/pci/ixgbe/ixgbe_82598.c
566
u32 autoc_reg;
sys/dev/pci/ixgbe/ixgbe_82598.c
567
u32 links_reg;
sys/dev/pci/ixgbe/ixgbe_82598.c
568
u32 i;
sys/dev/pci/ixgbe/ixgbe_82598.c
613
u32 timeout;
sys/dev/pci/ixgbe/ixgbe_82598.c
652
u32 links_reg;
sys/dev/pci/ixgbe/ixgbe_82598.c
653
u32 i;
sys/dev/pci/ixgbe/ixgbe_82598.c
70
static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_82598.c
73
u32 headroom, int strategy);
sys/dev/pci/ixgbe/ixgbe_82598.c
744
u32 curr_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
sys/dev/pci/ixgbe/ixgbe_82598.c
745
u32 autoc = curr_autoc;
sys/dev/pci/ixgbe/ixgbe_82598.c
746
u32 link_mode = autoc & IXGBE_AUTOC_LMS_MASK;
sys/dev/pci/ixgbe/ixgbe_82598.c
820
u32 ctrl;
sys/dev/pci/ixgbe/ixgbe_82598.c
821
u32 gheccr;
sys/dev/pci/ixgbe/ixgbe_82598.c
822
u32 i;
sys/dev/pci/ixgbe/ixgbe_82598.c
823
u32 autoc;
sys/dev/pci/ixgbe/ixgbe_82598.c
88
u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR);
sys/dev/pci/ixgbe/ixgbe_82598.c
951
s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_82598.c
953
u32 rar_high;
sys/dev/pci/ixgbe/ixgbe_82598.c
954
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/pci/ixgbe/ixgbe_82598.c
977
static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_82598.c
979
u32 rar_high;
sys/dev/pci/ixgbe/ixgbe_82598.c
980
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/pci/ixgbe/ixgbe_82598.h
41
u32 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw);
sys/dev/pci/ixgbe/ixgbe_82598.h
45
s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_82598.h
46
s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
sys/dev/pci/ixgbe/ixgbe_82598.h
48
s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);
sys/dev/pci/ixgbe/ixgbe_82598.h
49
s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);
sys/dev/pci/ixgbe/ixgbe_82598.h
56
s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval);
sys/dev/pci/ixgbe/ixgbe_82599.c
1052
u32 ctrl = 0;
sys/dev/pci/ixgbe/ixgbe_82599.c
1053
u32 i, autoc, autoc2;
sys/dev/pci/ixgbe/ixgbe_82599.c
1054
u32 curr_lms;
sys/dev/pci/ixgbe/ixgbe_82599.c
1231
static s32 ixgbe_fdir_check_cmd_complete(struct ixgbe_hw *hw, u32 *fdircmd)
sys/dev/pci/ixgbe/ixgbe_82599.c
1253
u32 fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL);
sys/dev/pci/ixgbe/ixgbe_82599.c
1254
u32 fdircmd;
sys/dev/pci/ixgbe/ixgbe_82599.c
127
u32 esdp;
sys/dev/pci/ixgbe/ixgbe_82599.c
1323
static void ixgbe_fdir_enable_82599(struct ixgbe_hw *hw, u32 fdirctrl)
sys/dev/pci/ixgbe/ixgbe_82599.c
1365
s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl)
sys/dev/pci/ixgbe/ixgbe_82599.c
1392
s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
sys/dev/pci/ixgbe/ixgbe_82599.c
1431
u32 fdirctrl;
sys/dev/pci/ixgbe/ixgbe_82599.c
1467
u32 n = (_n); \
sys/dev/pci/ixgbe/ixgbe_82599.c
1493
u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
sys/dev/pci/ixgbe/ixgbe_82599.c
1496
u32 hi_hash_dword, lo_hash_dword, flow_vm_vlan;
sys/dev/pci/ixgbe/ixgbe_82599.c
1497
u32 sig_hash = 0, bucket_hash = 0, common_hash = 0;
sys/dev/pci/ixgbe/ixgbe_82599.c
1567
u32 fdircmd;
sys/dev/pci/ixgbe/ixgbe_82599.c
1595
fdircmd |= (u32)flow_type << IXGBE_FDIRCMD_FLOW_TYPE_SHIFT;
sys/dev/pci/ixgbe/ixgbe_82599.c
1596
fdircmd |= (u32)queue << IXGBE_FDIRCMD_RX_QUEUE_SHIFT;
sys/dev/pci/ixgbe/ixgbe_82599.c
1608
DEBUGOUT2("Tx Queue=%x hash=%x\n", queue, (u32)fdirhashcmd);
sys/dev/pci/ixgbe/ixgbe_82599.c
1615
u32 n = (_n); \
sys/dev/pci/ixgbe/ixgbe_82599.c
1637
u32 hi_hash_dword, lo_hash_dword, flow_vm_vlan;
sys/dev/pci/ixgbe/ixgbe_82599.c
1638
u32 bucket_hash = 0;
sys/dev/pci/ixgbe/ixgbe_82599.c
1639
u32 hi_dword = 0;
sys/dev/pci/ixgbe/ixgbe_82599.c
1640
u32 i = 0;
sys/dev/pci/ixgbe/ixgbe_82599.c
1690
static u32 ixgbe_get_fdirtcpm_82599(union ixgbe_atr_input *input_mask)
sys/dev/pci/ixgbe/ixgbe_82599.c
1692
u32 mask = IXGBE_NTOHS(input_mask->formatted.dst_port);
sys/dev/pci/ixgbe/ixgbe_82599.c
1694
mask |= (u32)IXGBE_NTOHS(input_mask->formatted.src_port);
sys/dev/pci/ixgbe/ixgbe_82599.c
1709
(((u32)(_value) >> 24) | (((u32)(_value) & 0x00FF0000) >> 8) | \
sys/dev/pci/ixgbe/ixgbe_82599.c
1710
(((u32)(_value) & 0x0000FF00) << 8) | ((u32)(_value) << 24))
sys/dev/pci/ixgbe/ixgbe_82599.c
1722
u32 fdirm = IXGBE_FDIRM_DIPv6;
sys/dev/pci/ixgbe/ixgbe_82599.c
1723
u32 fdirtcpm;
sys/dev/pci/ixgbe/ixgbe_82599.c
1724
u32 fdirip6m;
sys/dev/pci/ixgbe/ixgbe_82599.c
1803
fdirip6m = ((u32) 0xFFFFU << IXGBE_FDIRIP6M_DIPM_SHIFT);
sys/dev/pci/ixgbe/ixgbe_82599.c
1899
u32 fdirport, fdirvlan, fdirhash, fdircmd;
sys/dev/pci/ixgbe/ixgbe_82599.c
1900
u32 addr_low, addr_high;
sys/dev/pci/ixgbe/ixgbe_82599.c
1901
u32 cloud_type = 0;
sys/dev/pci/ixgbe/ixgbe_82599.c
1927
fdirport |= (u32)IXGBE_NTOHS(input->formatted.src_port);
sys/dev/pci/ixgbe/ixgbe_82599.c
1934
fdirvlan |= (u32)IXGBE_NTOHS(input->formatted.vlan_id);
sys/dev/pci/ixgbe/ixgbe_82599.c
1941
addr_low = ((u32)input->formatted.inner_mac[0] |
sys/dev/pci/ixgbe/ixgbe_82599.c
1942
((u32)input->formatted.inner_mac[1] << 8) |
sys/dev/pci/ixgbe/ixgbe_82599.c
1943
((u32)input->formatted.inner_mac[2] << 16) |
sys/dev/pci/ixgbe/ixgbe_82599.c
1944
((u32)input->formatted.inner_mac[3] << 24));
sys/dev/pci/ixgbe/ixgbe_82599.c
1945
addr_high = ((u32)input->formatted.inner_mac[4] |
sys/dev/pci/ixgbe/ixgbe_82599.c
1946
((u32)input->formatted.inner_mac[5] << 8));
sys/dev/pci/ixgbe/ixgbe_82599.c
1972
fdircmd |= (u32)queue << IXGBE_FDIRCMD_RX_QUEUE_SHIFT;
sys/dev/pci/ixgbe/ixgbe_82599.c
1973
fdircmd |= (u32)input->formatted.vm_pool << IXGBE_FDIRCMD_VT_POOL_SHIFT;
sys/dev/pci/ixgbe/ixgbe_82599.c
1989
u32 fdirhash;
sys/dev/pci/ixgbe/ixgbe_82599.c
1990
u32 fdircmd;
sys/dev/pci/ixgbe/ixgbe_82599.c
2096
s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val)
sys/dev/pci/ixgbe/ixgbe_82599.c
2098
u32 core_ctl;
sys/dev/pci/ixgbe/ixgbe_82599.c
2120
s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val)
sys/dev/pci/ixgbe/ixgbe_82599.c
2122
u32 core_ctl;
sys/dev/pci/ixgbe/ixgbe_82599.c
2209
u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);
sys/dev/pci/ixgbe/ixgbe_82599.c
2210
u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
sys/dev/pci/ixgbe/ixgbe_82599.c
2211
u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
sys/dev/pci/ixgbe/ixgbe_82599.c
2212
u32 pma_pmd_10g_parallel = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK;
sys/dev/pci/ixgbe/ixgbe_82599.c
2213
u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK;
sys/dev/pci/ixgbe/ixgbe_82599.c
2294
s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval)
sys/dev/pci/ixgbe/ixgbe_82599.c
2503
u32 anlp1_reg = 0;
sys/dev/pci/ixgbe/ixgbe_82599.c
2504
u32 i, autoc_reg, autoc2_reg;
sys/dev/pci/ixgbe/ixgbe_82599.c
2556
u32 esdp;
sys/dev/pci/ixgbe/ixgbe_82599.c
257
s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)
sys/dev/pci/ixgbe/ixgbe_82599.c
2614
u32 esdp;
sys/dev/pci/ixgbe/ixgbe_82599.c
286
s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 autoc, bool locked)
sys/dev/pci/ixgbe/ixgbe_82599.c
429
u32 autoc = 0;
sys/dev/pci/ixgbe/ixgbe_82599.c
601
u32 autoc2_reg;
sys/dev/pci/ixgbe/ixgbe_82599.c
626
u32 autoc_reg;
sys/dev/pci/ixgbe/ixgbe_82599.c
627
u32 links_reg;
sys/dev/pci/ixgbe/ixgbe_82599.c
628
u32 i;
sys/dev/pci/ixgbe/ixgbe_82599.c
692
u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);
sys/dev/pci/ixgbe/ixgbe_82599.c
715
u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);
sys/dev/pci/ixgbe/ixgbe_82599.c
761
u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);
sys/dev/pci/ixgbe/ixgbe_82599.c
796
u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);
sys/dev/pci/ixgbe/ixgbe_82599.c
906
u32 pma_pmd_1g, link_mode;
sys/dev/pci/ixgbe/ixgbe_82599.c
907
u32 current_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); /* holds the value of AUTOC register at this current point in time */
sys/dev/pci/ixgbe/ixgbe_82599.c
908
u32 orig_autoc = 0; /* holds the cached value of AUTOC register */
sys/dev/pci/ixgbe/ixgbe_82599.c
909
u32 autoc = current_autoc; /* Temporary variable used for comparison purposes */
sys/dev/pci/ixgbe/ixgbe_82599.c
910
u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
sys/dev/pci/ixgbe/ixgbe_82599.c
911
u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK;
sys/dev/pci/ixgbe/ixgbe_82599.c
912
u32 links_reg;
sys/dev/pci/ixgbe/ixgbe_82599.c
913
u32 i;
sys/dev/pci/ixgbe/ixgbe_82599.h
59
s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);
sys/dev/pci/ixgbe/ixgbe_82599.h
60
s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);
sys/dev/pci/ixgbe/ixgbe_82599.h
65
s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval);
sys/dev/pci/ixgbe/ixgbe_82599.h
66
s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val);
sys/dev/pci/ixgbe/ixgbe_82599.h
67
s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 reg_val, bool locked);
sys/dev/pci/ixgbe/ixgbe_api.c
1008
u32 addr_count, ixgbe_mc_addr_itr func)
sys/dev/pci/ixgbe/ixgbe_api.c
1029
u32 mc_addr_count, ixgbe_mc_addr_itr func,
sys/dev/pci/ixgbe/ixgbe_api.c
1083
s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
sys/dev/pci/ixgbe/ixgbe_api.c
1103
s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
sys/dev/pci/ixgbe/ixgbe_api.c
1104
u32 *vfta_delta, u32 vfta, bool vlvf_bypass)
sys/dev/pci/ixgbe/ixgbe_api.c
1118
s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind)
sys/dev/pci/ixgbe/ixgbe_api.c
1255
s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_api.c
1256
u32 device_type, u32 *phy_data)
sys/dev/pci/ixgbe/ixgbe_api.c
1271
s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_api.c
1272
u32 device_type, u32 phy_data)
sys/dev/pci/ixgbe/ixgbe_api.c
1306
void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
sys/dev/pci/ixgbe/ixgbe_api.c
1319
void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
sys/dev/pci/ixgbe/ixgbe_api.c
1375
s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status)
sys/dev/pci/ixgbe/ixgbe_api.c
1393
bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg)
sys/dev/pci/ixgbe/ixgbe_api.c
1411
s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action)
sys/dev/pci/ixgbe/ixgbe_api.c
1424
s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value)
sys/dev/pci/ixgbe/ixgbe_api.c
1438
s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
sys/dev/pci/ixgbe/ixgbe_api.c
1452
s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
sys/dev/pci/ixgbe/ixgbe_api.c
1649
s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
sys/dev/pci/ixgbe/ixgbe_api.c
1687
s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_api.c
1701
void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_api.c
416
u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
sys/dev/pci/ixgbe/ixgbe_api.c
427
u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
sys/dev/pci/ixgbe/ixgbe_api.c
455
s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
sys/dev/pci/ixgbe/ixgbe_api.c
46
static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
sys/dev/pci/ixgbe/ixgbe_api.c
467
s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
sys/dev/pci/ixgbe/ixgbe_api.c
50
static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
sys/dev/pci/ixgbe/ixgbe_api.c
534
s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/pci/ixgbe/ixgbe_api.c
54
static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
sys/dev/pci/ixgbe/ixgbe_api.c
553
s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/pci/ixgbe/ixgbe_api.c
58
static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
sys/dev/pci/ixgbe/ixgbe_api.c
62
static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = {
sys/dev/pci/ixgbe/ixgbe_api.c
743
s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_api.c
756
s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_api.c
769
s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_api.c
782
s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_api.c
900
s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_api.c
917
s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/pci/ixgbe/ixgbe_api.c
918
u32 enable_addr)
sys/dev/pci/ixgbe/ixgbe_api.c
931
s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_api.c
943
s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_api.c
955
s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_api.c
967
s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_api.c
991
u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
sys/dev/pci/ixgbe/ixgbe_api.h
100
s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_api.h
113
s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_api.h
114
s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/pci/ixgbe/ixgbe_api.h
115
u32 enable_addr);
sys/dev/pci/ixgbe/ixgbe_api.h
116
s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_api.h
117
s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_api.h
118
s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_api.h
119
s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_api.h
121
u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
sys/dev/pci/ixgbe/ixgbe_api.h
123
u32 addr_count, ixgbe_mc_addr_itr func);
sys/dev/pci/ixgbe/ixgbe_api.h
125
u32 mc_addr_count, ixgbe_mc_addr_itr func,
sys/dev/pci/ixgbe/ixgbe_api.h
127
void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_api.h
131
s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
sys/dev/pci/ixgbe/ixgbe_api.h
132
u32 vind, bool vlan_on, bool vlvf_bypass);
sys/dev/pci/ixgbe/ixgbe_api.h
133
s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/pci/ixgbe/ixgbe_api.h
134
bool vlan_on, u32 *vfta_delta, u32 vfta,
sys/dev/pci/ixgbe/ixgbe_api.h
136
s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind);
sys/dev/pci/ixgbe/ixgbe_api.h
144
s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
sys/dev/pci/ixgbe/ixgbe_api.h
145
s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
sys/dev/pci/ixgbe/ixgbe_api.h
149
s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
sys/dev/pci/ixgbe/ixgbe_api.h
154
s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
sys/dev/pci/ixgbe/ixgbe_api.h
155
s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
sys/dev/pci/ixgbe/ixgbe_api.h
177
u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
sys/dev/pci/ixgbe/ixgbe_api.h
197
s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
sys/dev/pci/ixgbe/ixgbe_api.h
198
void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
sys/dev/pci/ixgbe/ixgbe_api.h
203
s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status);
sys/dev/pci/ixgbe/ixgbe_api.h
204
s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);
sys/dev/pci/ixgbe/ixgbe_api.h
205
s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value);
sys/dev/pci/ixgbe/ixgbe_api.h
206
bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg);
sys/dev/pci/ixgbe/ixgbe_api.h
215
s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_api.h
216
u32 device_type, u32 *phy_data);
sys/dev/pci/ixgbe/ixgbe_api.h
217
s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_api.h
218
u32 device_type, u32 phy_data);
sys/dev/pci/ixgbe/ixgbe_api.h
221
void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);
sys/dev/pci/ixgbe/ixgbe_api.h
222
void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);
sys/dev/pci/ixgbe/ixgbe_api.h
229
s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
sys/dev/pci/ixgbe/ixgbe_api.h
230
u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);
sys/dev/pci/ixgbe/ixgbe_api.h
64
u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
sys/dev/pci/ixgbe/ixgbe_api.h
65
u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
sys/dev/pci/ixgbe/ixgbe_api.h
67
s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
sys/dev/pci/ixgbe/ixgbe_api.h
68
s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
sys/dev/pci/ixgbe/ixgbe_api.h
72
s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/pci/ixgbe/ixgbe_api.h
74
s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/pci/ixgbe/ixgbe_api.h
97
s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_api.h
98
s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_api.h
99
s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_common.c
1086
u32 reg;
sys/dev/pci/ixgbe/ixgbe_common.c
1119
u32 reg_val;
sys/dev/pci/ixgbe/ixgbe_common.c
1192
u32 led_reg, led_mode;
sys/dev/pci/ixgbe/ixgbe_common.c
1228
s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_common.c
1230
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
sys/dev/pci/ixgbe/ixgbe_common.c
1251
s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_common.c
1253
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
sys/dev/pci/ixgbe/ixgbe_common.c
1279
u32 eec;
sys/dev/pci/ixgbe/ixgbe_common.c
1636
u32 eerd;
sys/dev/pci/ixgbe/ixgbe_common.c
1638
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
1744
u32 eewr;
sys/dev/pci/ixgbe/ixgbe_common.c
1809
s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg)
sys/dev/pci/ixgbe/ixgbe_common.c
1811
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
1812
u32 reg;
sys/dev/pci/ixgbe/ixgbe_common.c
1847
u32 eec;
sys/dev/pci/ixgbe/ixgbe_common.c
1848
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
1901
u32 timeout = 2000;
sys/dev/pci/ixgbe/ixgbe_common.c
1902
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
1903
u32 swsm;
sys/dev/pci/ixgbe/ixgbe_common.c
1990
u32 swsm;
sys/dev/pci/ixgbe/ixgbe_common.c
2049
u32 eec;
sys/dev/pci/ixgbe/ixgbe_common.c
2075
u32 eec;
sys/dev/pci/ixgbe/ixgbe_common.c
2076
u32 mask;
sys/dev/pci/ixgbe/ixgbe_common.c
2077
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
2130
u32 eec;
sys/dev/pci/ixgbe/ixgbe_common.c
2131
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
2168
static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec)
sys/dev/pci/ixgbe/ixgbe_common.c
2187
static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec)
sys/dev/pci/ixgbe/ixgbe_common.c
2207
u32 eec;
sys/dev/pci/ixgbe/ixgbe_common.c
240
u32 reg = 0, reg_bp = 0;
sys/dev/pci/ixgbe/ixgbe_common.c
2410
s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/pci/ixgbe/ixgbe_common.c
2411
u32 enable_addr)
sys/dev/pci/ixgbe/ixgbe_common.c
2413
u32 rar_low, rar_high;
sys/dev/pci/ixgbe/ixgbe_common.c
2414
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/pci/ixgbe/ixgbe_common.c
2432
rar_low = ((u32)addr[0] |
sys/dev/pci/ixgbe/ixgbe_common.c
2433
((u32)addr[1] << 8) |
sys/dev/pci/ixgbe/ixgbe_common.c
2434
((u32)addr[2] << 16) |
sys/dev/pci/ixgbe/ixgbe_common.c
2435
((u32)addr[3] << 24));
sys/dev/pci/ixgbe/ixgbe_common.c
2443
rar_high |= ((u32)addr[4] | ((u32)addr[5] << 8));
sys/dev/pci/ixgbe/ixgbe_common.c
2461
s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_common.c
2463
u32 rar_high;
sys/dev/pci/ixgbe/ixgbe_common.c
2464
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/pci/ixgbe/ixgbe_common.c
2502
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
2503
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/pci/ixgbe/ixgbe_common.c
2569
void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_common.c
2571
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/pci/ixgbe/ixgbe_common.c
2572
u32 rar;
sys/dev/pci/ixgbe/ixgbe_common.c
2610
u32 addr_count, ixgbe_mc_addr_itr next)
sys/dev/pci/ixgbe/ixgbe_common.c
2613
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
2614
u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc;
sys/dev/pci/ixgbe/ixgbe_common.c
2615
u32 uc_addr_in_use;
sys/dev/pci/ixgbe/ixgbe_common.c
2616
u32 fctrl;
sys/dev/pci/ixgbe/ixgbe_common.c
2617
u32 vmdq;
sys/dev/pci/ixgbe/ixgbe_common.c
2679
u32 vector = 0;
sys/dev/pci/ixgbe/ixgbe_common.c
2716
u32 vector;
sys/dev/pci/ixgbe/ixgbe_common.c
2717
u32 vector_bit;
sys/dev/pci/ixgbe/ixgbe_common.c
2718
u32 vector_reg;
sys/dev/pci/ixgbe/ixgbe_common.c
2753
u32 mc_addr_count, ixgbe_mc_addr_itr next,
sys/dev/pci/ixgbe/ixgbe_common.c
2756
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
2757
u32 vmdq;
sys/dev/pci/ixgbe/ixgbe_common.c
2839
u32 mflcn_reg, fccfg_reg;
sys/dev/pci/ixgbe/ixgbe_common.c
2840
u32 reg;
sys/dev/pci/ixgbe/ixgbe_common.c
2841
u32 fcrtl, fcrth;
sys/dev/pci/ixgbe/ixgbe_common.c
2952
reg = (u32)hw->fc.pause_time * 0x00010001;
sys/dev/pci/ixgbe/ixgbe_common.c
2976
s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
sys/dev/pci/ixgbe/ixgbe_common.c
2977
u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)
sys/dev/pci/ixgbe/ixgbe_common.c
3025
u32 pcs_anadv_reg, pcs_lpab_reg, linkstat;
sys/dev/pci/ixgbe/ixgbe_common.c
3062
u32 links2, anlp1_reg, autoc_reg, links;
sys/dev/pci/ixgbe/ixgbe_common.c
3116
return ixgbe_negotiate_fc(hw, (u32)technology_ability_reg,
sys/dev/pci/ixgbe/ixgbe_common.c
3117
(u32)lp_technology_ability_reg,
sys/dev/pci/ixgbe/ixgbe_common.c
3199
static u32 ixgbe_pcie_timeout_poll(struct ixgbe_hw *hw)
sys/dev/pci/ixgbe/ixgbe_common.c
3202
u32 pollcnt;
sys/dev/pci/ixgbe/ixgbe_common.c
3248
u32 i, poll;
sys/dev/pci/ixgbe/ixgbe_common.c
3312
s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_common.c
3314
u32 gssr = 0;
sys/dev/pci/ixgbe/ixgbe_common.c
3315
u32 swmask = mask;
sys/dev/pci/ixgbe/ixgbe_common.c
3316
u32 fwmask = mask << 5;
sys/dev/pci/ixgbe/ixgbe_common.c
3317
u32 timeout = 200;
sys/dev/pci/ixgbe/ixgbe_common.c
3318
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
3359
void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_common.c
3361
u32 gssr;
sys/dev/pci/ixgbe/ixgbe_common.c
3362
u32 swmask = mask;
sys/dev/pci/ixgbe/ixgbe_common.c
3419
s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)
sys/dev/pci/ixgbe/ixgbe_common.c
3435
s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked)
sys/dev/pci/ixgbe/ixgbe_common.c
3451
u32 secrxreg;
sys/dev/pci/ixgbe/ixgbe_common.c
3470
s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval)
sys/dev/pci/ixgbe/ixgbe_common.c
3487
s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_common.c
3491
u32 autoc_reg = 0;
sys/dev/pci/ixgbe/ixgbe_common.c
3492
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
sys/dev/pci/ixgbe/ixgbe_common.c
3537
s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_common.c
3539
u32 autoc_reg = 0;
sys/dev/pci/ixgbe/ixgbe_common.c
3540
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
sys/dev/pci/ixgbe/ixgbe_common.c
3747
s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_common.c
3749
static const u32 NO_EMPTY_RAR_FOUND = 0xFFFFFFFF;
sys/dev/pci/ixgbe/ixgbe_common.c
3750
u32 first_empty_rar = NO_EMPTY_RAR_FOUND;
sys/dev/pci/ixgbe/ixgbe_common.c
3751
u32 rar;
sys/dev/pci/ixgbe/ixgbe_common.c
3752
u32 rar_low, rar_high;
sys/dev/pci/ixgbe/ixgbe_common.c
3753
u32 addr_low, addr_high;
sys/dev/pci/ixgbe/ixgbe_common.c
3813
s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_common.c
3815
u32 mpsar_lo, mpsar_hi;
sys/dev/pci/ixgbe/ixgbe_common.c
3816
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/pci/ixgbe/ixgbe_common.c
3867
s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_common.c
3869
u32 mpsar;
sys/dev/pci/ixgbe/ixgbe_common.c
3870
u32 rar_entries = hw->mac.num_rar_entries;
sys/dev/pci/ixgbe/ixgbe_common.c
3903
s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq)
sys/dev/pci/ixgbe/ixgbe_common.c
3905
u32 rar = hw->mac.san_mac_rar_index;
sys/dev/pci/ixgbe/ixgbe_common.c
3948
s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass)
sys/dev/pci/ixgbe/ixgbe_common.c
3951
u32 bits;
sys/dev/pci/ixgbe/ixgbe_common.c
399
u32 ctrl_ext;
sys/dev/pci/ixgbe/ixgbe_common.c
3998
s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/pci/ixgbe/ixgbe_common.c
4001
u32 regidx, vfta_delta, vfta;
sys/dev/pci/ixgbe/ixgbe_common.c
4022
vfta_delta = (u32)1 << (vlan % 32);
sys/dev/pci/ixgbe/ixgbe_common.c
4065
s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/pci/ixgbe/ixgbe_common.c
4066
bool vlan_on, u32 *vfta_delta, u32 vfta,
sys/dev/pci/ixgbe/ixgbe_common.c
4069
u32 bits;
sys/dev/pci/ixgbe/ixgbe_common.c
4149
u32 offset;
sys/dev/pci/ixgbe/ixgbe_common.c
4172
s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vf_number)
sys/dev/pci/ixgbe/ixgbe_common.c
4175
u32 offset, reg;
sys/dev/pci/ixgbe/ixgbe_common.c
4258
u32 links_reg, links_orig;
sys/dev/pci/ixgbe/ixgbe_common.c
4259
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
4467
u32 pfvfspoof;
sys/dev/pci/ixgbe/ixgbe_common.c
4491
u32 pfvfspoof;
sys/dev/pci/ixgbe/ixgbe_common.c
4528
u32 regval;
sys/dev/pci/ixgbe/ixgbe_common.c
4529
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
4556
u8 ixgbe_calculate_checksum(u8 *buffer, u32 length)
sys/dev/pci/ixgbe/ixgbe_common.c
4558
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
4586
s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 length,
sys/dev/pci/ixgbe/ixgbe_common.c
4587
u32 timeout)
sys/dev/pci/ixgbe/ixgbe_common.c
4589
u32 hicr, i, fwsts;
sys/dev/pci/ixgbe/ixgbe_common.c
4611
if (length % sizeof(u32)) {
sys/dev/pci/ixgbe/ixgbe_common.c
462
u32 i;
sys/dev/pci/ixgbe/ixgbe_common.c
463
u32 regval;
sys/dev/pci/ixgbe/ixgbe_common.c
4671
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
sys/dev/pci/ixgbe/ixgbe_common.c
4672
u32 length, u32 timeout, bool return_data)
sys/dev/pci/ixgbe/ixgbe_common.c
4674
u32 hdr_size = sizeof(struct ixgbe_hic_hdr);
sys/dev/pci/ixgbe/ixgbe_common.c
4678
u32 bi;
sys/dev/pci/ixgbe/ixgbe_common.c
4679
u32 dword_len;
sys/dev/pci/ixgbe/ixgbe_common.c
4792
ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
sys/dev/pci/ixgbe/ixgbe_common.c
4818
void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
sys/dev/pci/ixgbe/ixgbe_common.c
4821
u32 pbsize = hw->mac.rx_pb_size;
sys/dev/pci/ixgbe/ixgbe_common.c
4823
u32 rxpktsize, txpktsize, txpbthresh;
sys/dev/pci/ixgbe/ixgbe_common.c
4880
u32 gcr_ext, hlreg0, i, poll;
sys/dev/pci/ixgbe/ixgbe_common.c
4941
s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status)
sys/dev/pci/ixgbe/ixgbe_common.c
4944
u32 sck, sdi, sdo, dir_sck, dir_sdi, dir_sdo;
sys/dev/pci/ixgbe/ixgbe_common.c
4945
u32 esdp;
sys/dev/pci/ixgbe/ixgbe_common.c
5054
bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg)
sys/dev/pci/ixgbe/ixgbe_common.c
5056
u32 mask;
sys/dev/pci/ixgbe/ixgbe_common.c
5109
s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event,
sys/dev/pci/ixgbe/ixgbe_common.c
5110
u32 action)
sys/dev/pci/ixgbe/ixgbe_common.c
5112
u32 by_ctl = 0;
sys/dev/pci/ixgbe/ixgbe_common.c
5113
u32 cmd, verify;
sys/dev/pci/ixgbe/ixgbe_common.c
5114
u32 count = 0;
sys/dev/pci/ixgbe/ixgbe_common.c
5151
s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value)
sys/dev/pci/ixgbe/ixgbe_common.c
5153
u32 cmd;
sys/dev/pci/ixgbe/ixgbe_common.c
5154
u32 status;
sys/dev/pci/ixgbe/ixgbe_common.c
5297
u32 reg, i;
sys/dev/pci/ixgbe/ixgbe_common.c
5308
u32 pfdtxgswc;
sys/dev/pci/ixgbe/ixgbe_common.c
5309
u32 rxctrl;
sys/dev/pci/ixgbe/ixgbe_common.c
5330
u32 pfdtxgswc;
sys/dev/pci/ixgbe/ixgbe_common.c
5331
u32 rxctrl;
sys/dev/pci/ixgbe/ixgbe_common.c
5352
u32 fwsm;
sys/dev/pci/ixgbe/ixgbe_common.c
5369
u32 fwsm, manc, factps;
sys/dev/pci/ixgbe/ixgbe_common.c
5403
u32 speedcnt = 0;
sys/dev/pci/ixgbe/ixgbe_common.c
5404
u32 i = 0;
sys/dev/pci/ixgbe/ixgbe_common.c
55
static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
sys/dev/pci/ixgbe/ixgbe_common.c
56
static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
sys/dev/pci/ixgbe/ixgbe_common.c
650
u32 pba_num_size)
sys/dev/pci/ixgbe/ixgbe_common.c
729
if (pba_num_size < (((u32)length * 2) - 1)) {
sys/dev/pci/ixgbe/ixgbe_common.c
759
s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num)
sys/dev/pci/ixgbe/ixgbe_common.c
774
*pba_num = (u32)(data << 16);
sys/dev/pci/ixgbe/ixgbe_common.c
781
*pba_num |= (u32)data;
sys/dev/pci/ixgbe/ixgbe_common.c
79
u32 eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));
sys/dev/pci/ixgbe/ixgbe_common.c
799
u32 eeprom_buf_size, u16 max_pba_block_size,
sys/dev/pci/ixgbe/ixgbe_common.c
842
if (eeprom_buf_size > (u32)(pba->word[1] +
sys/dev/pci/ixgbe/ixgbe_common.c
868
u32 eeprom_buf_size, struct ixgbe_pba *pba)
sys/dev/pci/ixgbe/ixgbe_common.c
900
if (eeprom_buf_size > (u32)(pba->word[1] +
sys/dev/pci/ixgbe/ixgbe_common.c
927
u32 eeprom_buf_size, u16 *pba_block_size)
sys/dev/pci/ixgbe/ixgbe_common.c
986
u32 rar_high;
sys/dev/pci/ixgbe/ixgbe_common.c
987
u32 rar_low;
sys/dev/pci/ixgbe/ixgbe_common.h
101
s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/pci/ixgbe/ixgbe_common.h
102
u32 enable_addr);
sys/dev/pci/ixgbe/ixgbe_common.h
103
s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_common.h
106
u32 mc_addr_count,
sys/dev/pci/ixgbe/ixgbe_common.h
109
u32 addr_count, ixgbe_mc_addr_itr func);
sys/dev/pci/ixgbe/ixgbe_common.h
112
s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
sys/dev/pci/ixgbe/ixgbe_common.h
122
s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
sys/dev/pci/ixgbe/ixgbe_common.h
123
void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
sys/dev/pci/ixgbe/ixgbe_common.h
126
s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
sys/dev/pci/ixgbe/ixgbe_common.h
127
s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
sys/dev/pci/ixgbe/ixgbe_common.h
129
s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_common.h
130
s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_common.h
135
s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_common.h
136
s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_common.h
137
s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_common.h
138
s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
sys/dev/pci/ixgbe/ixgbe_common.h
140
s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
sys/dev/pci/ixgbe/ixgbe_common.h
141
u32 vind, bool vlan_on, bool vlvf_bypass);
sys/dev/pci/ixgbe/ixgbe_common.h
142
s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/pci/ixgbe/ixgbe_common.h
143
bool vlan_on, u32 *vfta_delta, u32 vfta,
sys/dev/pci/ixgbe/ixgbe_common.h
146
s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass);
sys/dev/pci/ixgbe/ixgbe_common.h
147
s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vind);
sys/dev/pci/ixgbe/ixgbe_common.h
160
void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
sys/dev/pci/ixgbe/ixgbe_common.h
165
u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
sys/dev/pci/ixgbe/ixgbe_common.h
166
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
sys/dev/pci/ixgbe/ixgbe_common.h
167
u32 length, u32 timeout, bool return_data);
sys/dev/pci/ixgbe/ixgbe_common.h
168
s32 ixgbe_hic_unlocked(struct ixgbe_hw *, u32 *buffer, u32 length, u32 timeout);
sys/dev/pci/ixgbe/ixgbe_common.h
171
u32 (*data)[FW_PHY_ACT_DATA_COUNT]);
sys/dev/pci/ixgbe/ixgbe_common.h
173
s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status);
sys/dev/pci/ixgbe/ixgbe_common.h
174
bool ixgbe_bypass_valid_rd_generic(u32 in_reg, u32 out_reg);
sys/dev/pci/ixgbe/ixgbe_common.h
175
s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event,
sys/dev/pci/ixgbe/ixgbe_common.h
176
u32 action);
sys/dev/pci/ixgbe/ixgbe_common.h
177
s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value);
sys/dev/pci/ixgbe/ixgbe_common.h
44
IXGBE_WRITE_REG(hw, reg, (u32) value); \
sys/dev/pci/ixgbe/ixgbe_common.h
45
IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
sys/dev/pci/ixgbe/ixgbe_common.h
61
s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
sys/dev/pci/ixgbe/ixgbe_common.h
63
u32 pba_num_size);
sys/dev/pci/ixgbe/ixgbe_common.h
65
u32 eeprom_buf_size, u16 max_pba_block_size,
sys/dev/pci/ixgbe/ixgbe_common.h
68
u32 eeprom_buf_size, struct ixgbe_pba *pba);
sys/dev/pci/ixgbe/ixgbe_common.h
70
u32 eeprom_buf_size, u16 *pba_block_size);
sys/dev/pci/ixgbe/ixgbe_common.h
77
s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_common.h
78
s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_common.h
99
s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);
sys/dev/pci/ixgbe/ixgbe_dcb.c
100
u32 max_frame_size, u8 direction)
sys/dev/pci/ixgbe/ixgbe_dcb.c
103
u32 min_multiplier = 0;
sys/dev/pci/ixgbe/ixgbe_dcb.c
107
u32 min_credit = 0;
sys/dev/pci/ixgbe/ixgbe_dcb.c
108
u32 credit_refill = 0;
sys/dev/pci/ixgbe/ixgbe_dcb.c
109
u32 credit_max = 0;
sys/dev/pci/ixgbe/ixgbe_dcb.c
160
(u32)IXGBE_DCB_MAX_CREDIT_REFILL);
sys/dev/pci/ixgbe/ixgbe_dcb.h
133
u32 dcb_cfg_version; /* Not used...OS-specific? */
sys/dev/pci/ixgbe/ixgbe_dcb.h
134
u32 link_speed; /* For bandwidth allocation validation purpose */
sys/dev/pci/ixgbe/ixgbe_dcb.h
146
struct ixgbe_dcb_config *, u32, u8);
sys/dev/pci/ixgbe/ixgbe_dcb.h
69
u32 capabilities; /* DCB capabilities */
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
119
u32 reg = 0;
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
120
u32 credit_refill = 0;
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
121
u32 credit_max = 0;
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
178
u32 reg, max_credits;
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
196
reg |= (u32)(refill[i]);
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
197
reg |= (u32)(bwg_id[i]) << IXGBE_TDTQ2TCCR_BWG_SHIFT;
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
225
u32 reg;
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
239
reg |= (u32)(max[i]) << IXGBE_TDPT2TCCR_MCL_SHIFT;
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
240
reg |= (u32)(bwg_id[i]) << IXGBE_TDPT2TCCR_BWG_SHIFT;
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
268
u32 fcrtl, reg;
sys/dev/pci/ixgbe/ixgbe_dcb_82598.c
320
u32 reg = 0;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
129
u32 reg = 0;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
130
u32 credit_refill = 0;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
131
u32 credit_max = 0;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
159
reg |= (u32)(bwg_id[i]) << IXGBE_RTRPT4C_BWG_SHIFT;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
190
u32 reg, max_credits;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
203
reg |= (u32)(refill[i]);
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
204
reg |= (u32)(bwg_id[i]) << IXGBE_RTTDT2C_BWG_SHIFT;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
240
u32 reg;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
267
reg |= (u32)(max[i]) << IXGBE_RTTPT2C_MCL_SHIFT;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
268
reg |= (u32)(bwg_id[i]) << IXGBE_RTTPT2C_BWG_SHIFT;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
300
u32 i, j, fcrtl, reg;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
388
u32 reg = 0;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
514
u32 reg;
sys/dev/pci/ixgbe/ixgbe_dcb_82599.c
515
u32 q;
sys/dev/pci/ixgbe/ixgbe_features.h
47
#define IXGBE_FEATURE_VF (u32)(1 << 0)
sys/dev/pci/ixgbe/ixgbe_features.h
48
#define IXGBE_FEATURE_SRIOV (u32)(1 << 1)
sys/dev/pci/ixgbe/ixgbe_features.h
49
#define IXGBE_FEATURE_RSS (u32)(1 << 2)
sys/dev/pci/ixgbe/ixgbe_features.h
50
#define IXGBE_FEATURE_NETMAP (u32)(1 << 3)
sys/dev/pci/ixgbe/ixgbe_features.h
51
#define IXGBE_FEATURE_FAN_FAIL (u32)(1 << 4)
sys/dev/pci/ixgbe/ixgbe_features.h
52
#define IXGBE_FEATURE_TEMP_SENSOR (u32)(1 << 5)
sys/dev/pci/ixgbe/ixgbe_features.h
53
#define IXGBE_FEATURE_BYPASS (u32)(1 << 6)
sys/dev/pci/ixgbe/ixgbe_features.h
54
#define IXGBE_FEATURE_LEGACY_TX (u32)(1 << 7)
sys/dev/pci/ixgbe/ixgbe_features.h
55
#define IXGBE_FEATURE_FDIR (u32)(1 << 8)
sys/dev/pci/ixgbe/ixgbe_features.h
56
#define IXGBE_FEATURE_MSI (u32)(1 << 9)
sys/dev/pci/ixgbe/ixgbe_features.h
57
#define IXGBE_FEATURE_MSIX (u32)(1 << 10)
sys/dev/pci/ixgbe/ixgbe_features.h
58
#define IXGBE_FEATURE_EEE (u32)(1 << 11)
sys/dev/pci/ixgbe/ixgbe_features.h
59
#define IXGBE_FEATURE_LEGACY_IRQ (u32)(1 << 12)
sys/dev/pci/ixgbe/ixgbe_features.h
60
#define IXGBE_FEATURE_NEEDS_CTXD (u32)(1 << 13)
sys/dev/pci/ixgbe/ixgbe_features.h
61
#define IXGBE_FEATURE_RECOVERY_MODE (u32)(1 << 15)
sys/dev/pci/ixgbe/ixgbe_mbx.c
1015
static s32 ixgbe_read_mbx_pf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/pci/ixgbe/ixgbe_mbx.c
1052
static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/pci/ixgbe/ixgbe_mbx.c
1055
u32 pf_mailbox;
sys/dev/pci/ixgbe/ixgbe_mbx.c
123
s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
sys/dev/pci/ixgbe/ixgbe_mbx.c
303
static u32 ixgbe_read_mailbox_vf(struct ixgbe_hw *hw)
sys/dev/pci/ixgbe/ixgbe_mbx.c
305
u32 vf_mailbox = IXGBE_READ_REG(hw, IXGBE_VFMAILBOX);
sys/dev/pci/ixgbe/ixgbe_mbx.c
315
u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);
sys/dev/pci/ixgbe/ixgbe_mbx.c
325
u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);
sys/dev/pci/ixgbe/ixgbe_mbx.c
335
u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);
sys/dev/pci/ixgbe/ixgbe_mbx.c
352
static s32 ixgbe_check_for_bit_vf(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_mbx.c
354
u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);
sys/dev/pci/ixgbe/ixgbe_mbx.c
438
u32 vf_mailbox;
sys/dev/pci/ixgbe/ixgbe_mbx.c
489
u32 vf_mailbox;
sys/dev/pci/ixgbe/ixgbe_mbx.c
510
static s32 ixgbe_write_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/pci/ixgbe/ixgbe_mbx.c
552
static s32 ixgbe_write_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/pci/ixgbe/ixgbe_mbx.c
555
u32 vf_mailbox;
sys/dev/pci/ixgbe/ixgbe_mbx.c
57
s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
sys/dev/pci/ixgbe/ixgbe_mbx.c
602
static s32 ixgbe_read_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/pci/ixgbe/ixgbe_mbx.c
638
static s32 ixgbe_read_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/pci/ixgbe/ixgbe_mbx.c
641
u32 vf_mailbox;
sys/dev/pci/ixgbe/ixgbe_mbx.c
729
u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);
sys/dev/pci/ixgbe/ixgbe_mbx.c
731
u32 pfmbicr;
sys/dev/pci/ixgbe/ixgbe_mbx.c
744
u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);
sys/dev/pci/ixgbe/ixgbe_mbx.c
746
u32 pfmbicr;
sys/dev/pci/ixgbe/ixgbe_mbx.c
757
static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)
sys/dev/pci/ixgbe/ixgbe_mbx.c
759
u32 pfmbicr = IXGBE_READ_REG(hw, IXGBE_PFMBICR(index));
sys/dev/pci/ixgbe/ixgbe_mbx.c
776
u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);
sys/dev/pci/ixgbe/ixgbe_mbx.c
797
u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id);
sys/dev/pci/ixgbe/ixgbe_mbx.c
822
u32 vf_shift = IXGBE_PFVFLRE_SHIFT(vf_id);
sys/dev/pci/ixgbe/ixgbe_mbx.c
823
u32 index = IXGBE_PFVFLRE_INDEX(vf_id);
sys/dev/pci/ixgbe/ixgbe_mbx.c
825
u32 vflre = 0;
sys/dev/pci/ixgbe/ixgbe_mbx.c
86
s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
sys/dev/pci/ixgbe/ixgbe_mbx.c
864
u32 pf_mailbox;
sys/dev/pci/ixgbe/ixgbe_mbx.c
904
u32 pf_mailbox;
sys/dev/pci/ixgbe/ixgbe_mbx.c
923
static s32 ixgbe_write_mbx_pf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/pci/ixgbe/ixgbe_mbx.c
964
static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
sys/dev/pci/ixgbe/ixgbe_mbx.c
967
u32 pf_mailbox;
sys/dev/pci/ixgbe/ixgbe_mbx.h
198
s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);
sys/dev/pci/ixgbe/ixgbe_mbx.h
199
s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);
sys/dev/pci/ixgbe/ixgbe_mbx.h
200
s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);
sys/dev/pci/ixgbe/ixgbe_mbx.h
46
s32 (*read)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);
sys/dev/pci/ixgbe/ixgbe_mbx.h
47
s32 (*write)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);
sys/dev/pci/ixgbe/ixgbe_mbx.h
71
u32 timeout;
sys/dev/pci/ixgbe/ixgbe_mbx.h
72
u32 usec_delay;
sys/dev/pci/ixgbe/ixgbe_mbx.h
73
u32 vf_mailbox;
sys/dev/pci/ixgbe/ixgbe_osdep.c
100
ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val)
sys/dev/pci/ixgbe/ixgbe_osdep.c
107
inline u32
sys/dev/pci/ixgbe/ixgbe_osdep.c
108
ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset)
sys/dev/pci/ixgbe/ixgbe_osdep.c
116
ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val)
sys/dev/pci/ixgbe/ixgbe_osdep.c
50
ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg)
sys/dev/pci/ixgbe/ixgbe_osdep.c
68
ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value)
sys/dev/pci/ixgbe/ixgbe_osdep.c
92
inline u32
sys/dev/pci/ixgbe/ixgbe_osdep.c
93
ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
sys/dev/pci/ixgbe/ixgbe_osdep.h
191
extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_osdep.h
194
extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
sys/dev/pci/ixgbe/ixgbe_osdep.h
199
extern u32 ixgbe_read_reg(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_osdep.h
202
extern void ixgbe_write_reg(struct ixgbe_hw *, u32, u32);
sys/dev/pci/ixgbe/ixgbe_osdep.h
205
extern u32 ixgbe_read_reg_array(struct ixgbe_hw *, u32, u32);
sys/dev/pci/ixgbe/ixgbe_osdep.h
209
extern void ixgbe_write_reg_array(struct ixgbe_hw *, u32, u32, u32);
sys/dev/pci/ixgbe/ixgbe_phy.c
1018
u32 time_out;
sys/dev/pci/ixgbe/ixgbe_phy.c
1019
u32 max_time_out = 10;
sys/dev/pci/ixgbe/ixgbe_phy.c
1183
u32 i;
sys/dev/pci/ixgbe/ixgbe_phy.c
120
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/pci/ixgbe/ixgbe_phy.c
1365
u32 vendor_oui = 0;
sys/dev/pci/ixgbe/ixgbe_phy.c
1715
u32 vendor_oui = 0;
sys/dev/pci/ixgbe/ixgbe_phy.c
197
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/pci/ixgbe/ixgbe_phy.c
2075
u32 max_retry = 10;
sys/dev/pci/ixgbe/ixgbe_phy.c
2076
u32 retry = 0;
sys/dev/pci/ixgbe/ixgbe_phy.c
2077
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/pci/ixgbe/ixgbe_phy.c
2199
u32 max_retry = 2;
sys/dev/pci/ixgbe/ixgbe_phy.c
2200
u32 retry = 0;
sys/dev/pci/ixgbe/ixgbe_phy.c
2201
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/pci/ixgbe/ixgbe_phy.c
2299
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
sys/dev/pci/ixgbe/ixgbe_phy.c
2334
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
sys/dev/pci/ixgbe/ixgbe_phy.c
2335
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
sys/dev/pci/ixgbe/ixgbe_phy.c
2336
u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);
sys/dev/pci/ixgbe/ixgbe_phy.c
2337
u32 bb_en_bit = IXGBE_I2C_BB_EN_BY_MAC(hw);
sys/dev/pci/ixgbe/ixgbe_phy.c
2393
u32 i2cctl;
sys/dev/pci/ixgbe/ixgbe_phy.c
2424
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
sys/dev/pci/ixgbe/ixgbe_phy.c
2426
u32 i = 0;
sys/dev/pci/ixgbe/ixgbe_phy.c
2427
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
sys/dev/pci/ixgbe/ixgbe_phy.c
2428
u32 timeout = 10;
sys/dev/pci/ixgbe/ixgbe_phy.c
2477
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
sys/dev/pci/ixgbe/ixgbe_phy.c
2478
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
sys/dev/pci/ixgbe/ixgbe_phy.c
2512
u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
sys/dev/pci/ixgbe/ixgbe_phy.c
2546
static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
sys/dev/pci/ixgbe/ixgbe_phy.c
2548
u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);
sys/dev/pci/ixgbe/ixgbe_phy.c
2549
u32 i = 0;
sys/dev/pci/ixgbe/ixgbe_phy.c
2550
u32 timeout = IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT;
sys/dev/pci/ixgbe/ixgbe_phy.c
2551
u32 i2cctl_r = 0;
sys/dev/pci/ixgbe/ixgbe_phy.c
2582
static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
sys/dev/pci/ixgbe/ixgbe_phy.c
2605
static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data)
sys/dev/pci/ixgbe/ixgbe_phy.c
2607
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
sys/dev/pci/ixgbe/ixgbe_phy.c
2652
static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl)
sys/dev/pci/ixgbe/ixgbe_phy.c
2654
u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
sys/dev/pci/ixgbe/ixgbe_phy.c
2683
u32 i2cctl;
sys/dev/pci/ixgbe/ixgbe_phy.c
2684
u32 i;
sys/dev/pci/ixgbe/ixgbe_phy.c
2747
u32 status;
sys/dev/pci/ixgbe/ixgbe_phy.c
384
u32 mmngc;
sys/dev/pci/ixgbe/ixgbe_phy.c
408
bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr)
sys/dev/pci/ixgbe/ixgbe_phy.c
434
u32 status;
sys/dev/pci/ixgbe/ixgbe_phy.c
445
hw->phy.id = (u32)(phy_id_high << 16);
sys/dev/pci/ixgbe/ixgbe_phy.c
449
hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK);
sys/dev/pci/ixgbe/ixgbe_phy.c
450
hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK);
sys/dev/pci/ixgbe/ixgbe_phy.c
463
enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id)
sys/dev/pci/ixgbe/ixgbe_phy.c
504
u32 i;
sys/dev/pci/ixgbe/ixgbe_phy.c
54
static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
sys/dev/pci/ixgbe/ixgbe_phy.c
55
static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
sys/dev/pci/ixgbe/ixgbe_phy.c
56
static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
sys/dev/pci/ixgbe/ixgbe_phy.c
57
static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
sys/dev/pci/ixgbe/ixgbe_phy.c
585
s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/pci/ixgbe/ixgbe_phy.c
588
u32 i, data, command;
sys/dev/pci/ixgbe/ixgbe_phy.c
667
s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_phy.c
668
u32 device_type, u16 *phy_data)
sys/dev/pci/ixgbe/ixgbe_phy.c
671
u32 gssr = hw->phy.phy_semaphore_mask;
sys/dev/pci/ixgbe/ixgbe_phy.c
693
s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_phy.c
694
u32 device_type, u16 phy_data)
sys/dev/pci/ixgbe/ixgbe_phy.c
696
u32 i, command;
sys/dev/pci/ixgbe/ixgbe_phy.c
699
IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);
sys/dev/pci/ixgbe/ixgbe_phy.c
767
s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_phy.c
768
u32 device_type, u16 phy_data)
sys/dev/pci/ixgbe/ixgbe_phy.c
771
u32 gssr = hw->phy.phy_semaphore_mask;
sys/dev/pci/ixgbe/ixgbe_phy.h
163
bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr);
sys/dev/pci/ixgbe/ixgbe_phy.h
164
enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id);
sys/dev/pci/ixgbe/ixgbe_phy.h
168
s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/pci/ixgbe/ixgbe_phy.h
170
s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
sys/dev/pci/ixgbe/ixgbe_phy.h
172
s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_phy.h
173
u32 device_type, u16 *phy_data);
sys/dev/pci/ixgbe/ixgbe_phy.h
174
s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_phy.h
175
u32 device_type, u16 phy_data);
sys/dev/pci/ixgbe/ixgbe_sriov.h
80
u32 ixgbe_get_mtqc(int);
sys/dev/pci/ixgbe/ixgbe_sriov.h
81
u32 ixgbe_get_mrqc(int);
sys/dev/pci/ixgbe/ixgbe_type.h
3016
#define __le32 u32
sys/dev/pci/ixgbe/ixgbe_type.h
3025
#define __be32 u32
sys/dev/pci/ixgbe/ixgbe_type.h
325
u32 etk_id;
sys/dev/pci/ixgbe/ixgbe_type.h
3276
u32 address;
sys/dev/pci/ixgbe/ixgbe_type.h
3285
u32 address;
sys/dev/pci/ixgbe/ixgbe_type.h
3486
typedef u32 ixgbe_autoneg_advertised;
sys/dev/pci/ixgbe/ixgbe_type.h
3488
typedef u32 ixgbe_link_speed;
sys/dev/pci/ixgbe/ixgbe_type.h
3865
u32 num_mc_addrs;
sys/dev/pci/ixgbe/ixgbe_type.h
3866
u32 rar_used_count;
sys/dev/pci/ixgbe/ixgbe_type.h
3867
u32 mta_in_use;
sys/dev/pci/ixgbe/ixgbe_type.h
3868
u32 overflow_promisc;
sys/dev/pci/ixgbe/ixgbe_type.h
3885
u32 high_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Flow Ctrl High-water */
sys/dev/pci/ixgbe/ixgbe_type.h
3886
u32 low_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Flow Ctrl Low-water */
sys/dev/pci/ixgbe/ixgbe_type.h
4006
u32 *vmdq);
sys/dev/pci/ixgbe/ixgbe_type.h
4038
s32 (*read_analog_reg8)(struct ixgbe_hw*, u32, u8*);
sys/dev/pci/ixgbe/ixgbe_type.h
4039
s32 (*write_analog_reg8)(struct ixgbe_hw*, u32, u8);
sys/dev/pci/ixgbe/ixgbe_type.h
4041
s32 (*enable_rx_dma)(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4044
s32 (*acquire_swfw_sync)(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4045
void (*release_swfw_sync)(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4047
s32 (*prot_autoc_read)(struct ixgbe_hw *, bool *, u32 *);
sys/dev/pci/ixgbe/ixgbe_type.h
4048
s32 (*prot_autoc_write)(struct ixgbe_hw *, u32, bool);
sys/dev/pci/ixgbe/ixgbe_type.h
4062
void (*setup_rxpba)(struct ixgbe_hw *, int, u32, int);
sys/dev/pci/ixgbe/ixgbe_type.h
4065
s32 (*led_on)(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4066
s32 (*led_off)(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4067
s32 (*blink_led_start)(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4068
s32 (*blink_led_stop)(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4072
s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4073
s32 (*set_uc_addr)(struct ixgbe_hw *, u32, u8 *);
sys/dev/pci/ixgbe/ixgbe_type.h
4074
s32 (*clear_rar)(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4075
s32 (*insert_mac_addr)(struct ixgbe_hw *, u8 *, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4076
s32 (*set_vmdq)(struct ixgbe_hw *, u32, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4077
s32 (*set_vmdq_san_mac)(struct ixgbe_hw *, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4078
s32 (*clear_vmdq)(struct ixgbe_hw *, u32, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4080
s32 (*update_uc_addr_list)(struct ixgbe_hw *, u8 *, u32,
sys/dev/pci/ixgbe/ixgbe_type.h
4082
s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32,
sys/dev/pci/ixgbe/ixgbe_type.h
4089
s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool, bool);
sys/dev/pci/ixgbe/ixgbe_type.h
4090
s32 (*set_vlvf)(struct ixgbe_hw *, u32, u32, bool, u32 *, u32,
sys/dev/pci/ixgbe/ixgbe_type.h
4096
s32 (*toggle_txdctl)(struct ixgbe_hw *hw, u32 vf_index);
sys/dev/pci/ixgbe/ixgbe_type.h
4106
s32 (*bypass_rw) (struct ixgbe_hw *hw, u32 cmd, u32 *status);
sys/dev/pci/ixgbe/ixgbe_type.h
4107
bool (*bypass_valid_rd) (u32 in_reg, u32 out_reg);
sys/dev/pci/ixgbe/ixgbe_type.h
4108
s32 (*bypass_set) (struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);
sys/dev/pci/ixgbe/ixgbe_type.h
4109
s32 (*bypass_rd_eep) (struct ixgbe_hw *hw, u32 addr, u8 *value);
sys/dev/pci/ixgbe/ixgbe_type.h
4120
s32 (*read_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32 *);
sys/dev/pci/ixgbe/ixgbe_type.h
4121
s32 (*write_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32);
sys/dev/pci/ixgbe/ixgbe_type.h
4124
void (*mdd_event)(struct ixgbe_hw *hw, u32 *vf_bitmap);
sys/dev/pci/ixgbe/ixgbe_type.h
4125
void (*restore_mdd_vf)(struct ixgbe_hw *hw, u32 vf);
sys/dev/pci/ixgbe/ixgbe_type.h
4134
s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *);
sys/dev/pci/ixgbe/ixgbe_type.h
4135
s32 (*write_reg)(struct ixgbe_hw *, u32, u32, u16);
sys/dev/pci/ixgbe/ixgbe_type.h
4136
s32 (*read_reg_mdi)(struct ixgbe_hw *, u32, u32, u16 *);
sys/dev/pci/ixgbe/ixgbe_type.h
4137
s32 (*write_reg_mdi)(struct ixgbe_hw *, u32, u32, u16);
sys/dev/pci/ixgbe/ixgbe_type.h
4176
u32 semaphore_delay;
sys/dev/pci/ixgbe/ixgbe_type.h
4197
u32 mta_shadow[IXGBE_MAX_MTA];
sys/dev/pci/ixgbe/ixgbe_type.h
4199
u32 mcft_size;
sys/dev/pci/ixgbe/ixgbe_type.h
4200
u32 vft_size;
sys/dev/pci/ixgbe/ixgbe_type.h
4201
u32 num_rar_entries;
sys/dev/pci/ixgbe/ixgbe_type.h
4202
u32 rar_highwater;
sys/dev/pci/ixgbe/ixgbe_type.h
4203
u32 rx_pb_size;
sys/dev/pci/ixgbe/ixgbe_type.h
4204
u32 max_tx_queues;
sys/dev/pci/ixgbe/ixgbe_type.h
4205
u32 max_rx_queues;
sys/dev/pci/ixgbe/ixgbe_type.h
4206
u32 orig_autoc;
sys/dev/pci/ixgbe/ixgbe_type.h
4209
u32 orig_autoc2;
sys/dev/pci/ixgbe/ixgbe_type.h
4217
u32 max_link_up_time;
sys/dev/pci/ixgbe/ixgbe_type.h
4224
u32 addr;
sys/dev/pci/ixgbe/ixgbe_type.h
4225
u32 id;
sys/dev/pci/ixgbe/ixgbe_type.h
4228
u32 revision;
sys/dev/pci/ixgbe/ixgbe_type.h
4230
u32 phy_semaphore_mask;
sys/dev/pci/ixgbe/ixgbe_type.h
4242
u32 nw_mng_if_sel;
sys/dev/pci/ixgbe/ixgbe_type.h
4257
const u32 *mvals;
sys/dev/pci/ixgbe/ixgbe_type.h
4270
u32 quirks;
sys/dev/pci/ixgbe/ixgbe_type.h
4395
u32 logs;
sys/dev/pci/ixgbe/ixgbe_type.h
4396
u32 clear_off;
sys/dev/pci/ixgbe/ixgbe_type.h
731
u32 link_speed;
sys/dev/pci/ixgbe/ixgbe_vf.c
110
u32 vfsrrctl;
sys/dev/pci/ixgbe/ixgbe_vf.c
111
u32 vfdca_rxctrl;
sys/dev/pci/ixgbe/ixgbe_vf.c
112
u32 vfdca_txctrl;
sys/dev/pci/ixgbe/ixgbe_vf.c
191
u32 timeout = IXGBE_VF_INIT_TIMEOUT;
sys/dev/pci/ixgbe/ixgbe_vf.c
193
u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
sys/dev/pci/ixgbe/ixgbe_vf.c
265
u32 reg_val;
sys/dev/pci/ixgbe/ixgbe_vf.c
314
u32 vector = 0;
sys/dev/pci/ixgbe/ixgbe_vf.c
340
static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
sys/dev/pci/ixgbe/ixgbe_vf.c
341
u32 *retmsg, u16 size)
sys/dev/pci/ixgbe/ixgbe_vf.c
359
s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/pci/ixgbe/ixgbe_vf.c
360
u32 enable_addr)
sys/dev/pci/ixgbe/ixgbe_vf.c
362
u32 msgbuf[3];
sys/dev/pci/ixgbe/ixgbe_vf.c
395
u32 mc_addr_count, ixgbe_mc_addr_itr next,
sys/dev/pci/ixgbe/ixgbe_vf.c
398
u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
sys/dev/pci/ixgbe/ixgbe_vf.c
400
u32 vector;
sys/dev/pci/ixgbe/ixgbe_vf.c
401
u32 cnt, i;
sys/dev/pci/ixgbe/ixgbe_vf.c
402
u32 vmdq;
sys/dev/pci/ixgbe/ixgbe_vf.c
447
u32 msgbuf[2];
sys/dev/pci/ixgbe/ixgbe_vf.c
509
u32 msgbuf[2];
sys/dev/pci/ixgbe/ixgbe_vf.c
538
s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/pci/ixgbe/ixgbe_vf.c
541
u32 msgbuf[2];
sys/dev/pci/ixgbe/ixgbe_vf.c
548
msgbuf[0] |= (u32)vlan_on << IXGBE_VT_MSGINFO_SHIFT;
sys/dev/pci/ixgbe/ixgbe_vf.c
563
u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
sys/dev/pci/ixgbe/ixgbe_vf.c
575
u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
sys/dev/pci/ixgbe/ixgbe_vf.c
596
s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
sys/dev/pci/ixgbe/ixgbe_vf.c
598
u32 msgbuf[3], msgbuf_chk;
sys/dev/pci/ixgbe/ixgbe_vf.c
656
u32 in_msg = 0;
sys/dev/pci/ixgbe/ixgbe_vf.c
657
u32 links_reg;
sys/dev/pci/ixgbe/ixgbe_vf.c
755
u32 msgbuf[2];
sys/dev/pci/ixgbe/ixgbe_vf.c
779
u32 msg[3];
sys/dev/pci/ixgbe/ixgbe_vf.c
806
u32 msg[5];
sys/dev/pci/ixgbe/ixgbe_vf.h
104
u32 last_vfgprc;
sys/dev/pci/ixgbe/ixgbe_vf.h
105
u32 last_vfgptc;
sys/dev/pci/ixgbe/ixgbe_vf.h
108
u32 last_vfmprc;
sys/dev/pci/ixgbe/ixgbe_vf.h
122
u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw);
sys/dev/pci/ixgbe/ixgbe_vf.h
123
u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw);
sys/dev/pci/ixgbe/ixgbe_vf.h
129
s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
sys/dev/pci/ixgbe/ixgbe_vf.h
130
u32 enable_addr);
sys/dev/pci/ixgbe/ixgbe_vf.h
131
s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr);
sys/dev/pci/ixgbe/ixgbe_vf.h
133
u32 mc_addr_count, ixgbe_mc_addr_itr,
sys/dev/pci/ixgbe/ixgbe_vf.h
137
s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
sys/dev/pci/ixgbe/ixgbe_x540.c
1014
s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_x540.c
1016
u32 macc_reg;
sys/dev/pci/ixgbe/ixgbe_x540.c
1017
u32 ledctl_reg;
sys/dev/pci/ixgbe/ixgbe_x540.c
1055
s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index)
sys/dev/pci/ixgbe/ixgbe_x540.c
1057
u32 macc_reg;
sys/dev/pci/ixgbe/ixgbe_x540.c
1058
u32 ledctl_reg;
sys/dev/pci/ixgbe/ixgbe_x540.c
221
u32 ctrl, i;
sys/dev/pci/ixgbe/ixgbe_x540.c
222
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/pci/ixgbe/ixgbe_x540.c
377
u32 eec;
sys/dev/pci/ixgbe/ixgbe_x540.c
700
u32 flup;
sys/dev/pci/ixgbe/ixgbe_x540.c
747
u32 i;
sys/dev/pci/ixgbe/ixgbe_x540.c
748
u32 reg;
sys/dev/pci/ixgbe/ixgbe_x540.c
777
s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_x540.c
779
u32 swmask = mask & IXGBE_GSSR_NVM_PHY_MASK;
sys/dev/pci/ixgbe/ixgbe_x540.c
780
u32 fwmask = swmask << 5;
sys/dev/pci/ixgbe/ixgbe_x540.c
781
u32 swi2c_mask = mask & IXGBE_GSSR_I2C_MASK;
sys/dev/pci/ixgbe/ixgbe_x540.c
782
u32 timeout = 200;
sys/dev/pci/ixgbe/ixgbe_x540.c
783
u32 hwmask = 0;
sys/dev/pci/ixgbe/ixgbe_x540.c
784
u32 swfw_sync;
sys/dev/pci/ixgbe/ixgbe_x540.c
785
u32 i;
sys/dev/pci/ixgbe/ixgbe_x540.c
849
u32 rmask = IXGBE_GSSR_EEP_SM | IXGBE_GSSR_PHY0_SM |
sys/dev/pci/ixgbe/ixgbe_x540.c
874
void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_x540.c
876
u32 swmask = mask & (IXGBE_GSSR_NVM_PHY_MASK | IXGBE_GSSR_SW_MNG_SM);
sys/dev/pci/ixgbe/ixgbe_x540.c
877
u32 swfw_sync;
sys/dev/pci/ixgbe/ixgbe_x540.c
902
u32 timeout = 2000;
sys/dev/pci/ixgbe/ixgbe_x540.c
903
u32 i;
sys/dev/pci/ixgbe/ixgbe_x540.c
904
u32 swsm;
sys/dev/pci/ixgbe/ixgbe_x540.c
959
u32 swsm;
sys/dev/pci/ixgbe/ixgbe_x540.c
985
u32 rmask;
sys/dev/pci/ixgbe/ixgbe_x540.h
63
s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);
sys/dev/pci/ixgbe/ixgbe_x540.h
64
void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);
sys/dev/pci/ixgbe/ixgbe_x540.h
67
s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_x540.h
68
s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index);
sys/dev/pci/ixgbe/ixgbe_x550.c
1061
u32 reg, high_pri_tc;
sys/dev/pci/ixgbe/ixgbe_x550.c
1109
u32 tc, reg, pb_headroom, rx_pb_size, maxframe_size_kb;
sys/dev/pci/ixgbe/ixgbe_x550.c
1164
u32 reg;
sys/dev/pci/ixgbe/ixgbe_x550.c
1193
u32 eec;
sys/dev/pci/ixgbe/ixgbe_x550.c
1238
IXGBE_WRITE_REG(hw, IXGBE_PFFLPL, (u32)pfflp);
sys/dev/pci/ixgbe/ixgbe_x550.c
1239
IXGBE_WRITE_REG(hw, IXGBE_PFFLPH, (u32)(pfflp >> 32));
sys/dev/pci/ixgbe/ixgbe_x550.c
1254
u32 pfvfspoof;
sys/dev/pci/ixgbe/ixgbe_x550.c
1276
static s32 ixgbe_iosf_wait(struct ixgbe_hw *hw, u32 *ctrl)
sys/dev/pci/ixgbe/ixgbe_x550.c
1278
u32 i, command = 0;
sys/dev/pci/ixgbe/ixgbe_x550.c
1308
s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.c
1309
u32 device_type, u32 data)
sys/dev/pci/ixgbe/ixgbe_x550.c
1311
u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;
sys/dev/pci/ixgbe/ixgbe_x550.c
1312
u32 command, error __unused;
sys/dev/pci/ixgbe/ixgbe_x550.c
1354
s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.c
1355
u32 device_type, u32 *data)
sys/dev/pci/ixgbe/ixgbe_x550.c
1357
u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM;
sys/dev/pci/ixgbe/ixgbe_x550.c
1358
u32 command, error __unused;
sys/dev/pci/ixgbe/ixgbe_x550.c
1410
status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd,
sys/dev/pci/ixgbe/ixgbe_x550.c
1448
status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd,
sys/dev/pci/ixgbe/ixgbe_x550.c
1469
s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.c
1470
u32 device_type, u32 data)
sys/dev/pci/ixgbe/ixgbe_x550.c
1485
status = ixgbe_host_interface_command(hw, (u32 *)&write_cmd,
sys/dev/pci/ixgbe/ixgbe_x550.c
1499
s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.c
1500
u32 device_type, u32 *data)
sys/dev/pci/ixgbe/ixgbe_x550.c
1517
status = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd,
sys/dev/pci/ixgbe/ixgbe_x550.c
1535
u32 reg;
sys/dev/pci/ixgbe/ixgbe_x550.c
1558
u32 reg;
sys/dev/pci/ixgbe/ixgbe_x550.c
1580
void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf)
sys/dev/pci/ixgbe/ixgbe_x550.c
1582
u32 idx, reg, num_qs, start_q, bitmask;
sys/dev/pci/ixgbe/ixgbe_x550.c
1620
void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap)
sys/dev/pci/ixgbe/ixgbe_x550.c
1622
u32 wqbr;
sys/dev/pci/ixgbe/ixgbe_x550.c
1623
u32 i, j, reg, q, shift, vf, idx;
sys/dev/pci/ixgbe/ixgbe_x550.c
1810
u32 link_ctrl;
sys/dev/pci/ixgbe/ixgbe_x550.c
1828
u32 flx_mask_st20;
sys/dev/pci/ixgbe/ixgbe_x550.c
1859
u32 lval, sval, flx_val;
sys/dev/pci/ixgbe/ixgbe_x550.c
189
u32 retry;
sys/dev/pci/ixgbe/ixgbe_x550.c
1928
u32 lval, sval, flx_val;
sys/dev/pci/ixgbe/ixgbe_x550.c
2139
u32 status;
sys/dev/pci/ixgbe/ixgbe_x550.c
2226
u32 status;
sys/dev/pci/ixgbe/ixgbe_x550.c
2325
u32 reg_val;
sys/dev/pci/ixgbe/ixgbe_x550.c
2378
u32 store[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/pci/ixgbe/ixgbe_x550.c
2402
u32 store[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/pci/ixgbe/ixgbe_x550.c
2571
u32 hlreg0;
sys/dev/pci/ixgbe/ixgbe_x550.c
2610
u32 ctrl = 0;
sys/dev/pci/ixgbe/ixgbe_x550.c
2611
u32 i;
sys/dev/pci/ixgbe/ixgbe_x550.c
2613
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/pci/ixgbe/ixgbe_x550.c
262
u32 swfw_mask = hw->phy.phy_semaphore_mask;
sys/dev/pci/ixgbe/ixgbe_x550.c
2744
u32 status;
sys/dev/pci/ixgbe/ixgbe_x550.c
2854
u32 reg_val;
sys/dev/pci/ixgbe/ixgbe_x550.c
2909
u32 reg_slice, reg_phy_int, slice_offset;
sys/dev/pci/ixgbe/ixgbe_x550.c
3009
u32 reg_val;
sys/dev/pci/ixgbe/ixgbe_x550.c
3080
u32 reg_val;
sys/dev/pci/ixgbe/ixgbe_x550.c
3137
u32 ret;
sys/dev/pci/ixgbe/ixgbe_x550.c
3176
u32 status;
sys/dev/pci/ixgbe/ixgbe_x550.c
3238
u32 reg_val;
sys/dev/pci/ixgbe/ixgbe_x550.c
3307
const u32 mask = IXGBE_GSSR_SW_MNG_SM | IXGBE_GSSR_EEP_SM;
sys/dev/pci/ixgbe/ixgbe_x550.c
3329
status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer),
sys/dev/pci/ixgbe/ixgbe_x550.c
3352
const u32 mask = IXGBE_GSSR_SW_MNG_SM | IXGBE_GSSR_EEP_SM;
sys/dev/pci/ixgbe/ixgbe_x550.c
3354
u32 current_word = 0;
sys/dev/pci/ixgbe/ixgbe_x550.c
3357
u32 i;
sys/dev/pci/ixgbe/ixgbe_x550.c
338
u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
sys/dev/pci/ixgbe/ixgbe_x550.c
3386
status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer),
sys/dev/pci/ixgbe/ixgbe_x550.c
3395
u32 reg = IXGBE_FLEX_MNG + (FW_NVM_DATA_OFFSET << 2) +
sys/dev/pci/ixgbe/ixgbe_x550.c
3397
u32 value = IXGBE_READ_REG(hw, reg);
sys/dev/pci/ixgbe/ixgbe_x550.c
3442
status = ixgbe_host_interface_command(hw, (u32 *)&buffer,
sys/dev/pci/ixgbe/ixgbe_x550.c
3499
u32 i = 0;
sys/dev/pci/ixgbe/ixgbe_x550.c
3539
u32 buffer_size)
sys/dev/pci/ixgbe/ixgbe_x550.c
356
static s32 ixgbe_read_phy_reg_mdi_22(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.c
357
u32 dev_type, u16 *phy_data)
sys/dev/pci/ixgbe/ixgbe_x550.c
3575
if (buffer && ((u32)start + (u32)length > buffer_size))
sys/dev/pci/ixgbe/ixgbe_x550.c
359
u32 i, data, command;
sys/dev/pci/ixgbe/ixgbe_x550.c
3606
s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size)
sys/dev/pci/ixgbe/ixgbe_x550.c
3804
status = ixgbe_host_interface_command(hw, (u32 *)&buffer,
sys/dev/pci/ixgbe/ixgbe_x550.c
3911
u32 rxctrl, pfdtxgswc;
sys/dev/pci/ixgbe/ixgbe_x550.c
3933
status = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
sys/dev/pci/ixgbe/ixgbe_x550.c
3961
u32 save_autoneg;
sys/dev/pci/ixgbe/ixgbe_x550.c
403
static s32 ixgbe_write_phy_reg_mdi_22(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.c
404
u32 dev_type, u16 phy_data)
sys/dev/pci/ixgbe/ixgbe_x550.c
406
u32 i, command;
sys/dev/pci/ixgbe/ixgbe_x550.c
410
IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);
sys/dev/pci/ixgbe/ixgbe_x550.c
4103
u32 pause, asm_dir, reg_val;
sys/dev/pci/ixgbe/ixgbe_x550.c
4192
u32 link_s1, lp_an_page_low, an_cntl_1;
sys/dev/pci/ixgbe/ixgbe_x550.c
4282
u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/pci/ixgbe/ixgbe_x550.c
4337
u32 an_cntl = 0;
sys/dev/pci/ixgbe/ixgbe_x550.c
4423
u32 esdp;
sys/dev/pci/ixgbe/ixgbe_x550.c
4443
s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_x550.c
4466
void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_x550.c
4483
static s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_x550.c
4485
u32 hmask = mask & ~IXGBE_GSSR_TOKEN_SM;
sys/dev/pci/ixgbe/ixgbe_x550.c
4533
static void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)
sys/dev/pci/ixgbe/ixgbe_x550.c
4535
u32 hmask = mask & ~IXGBE_GSSR_TOKEN_SM;
sys/dev/pci/ixgbe/ixgbe_x550.c
4557
s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.c
4558
u32 device_type, u16 *phy_data)
sys/dev/pci/ixgbe/ixgbe_x550.c
4561
u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;
sys/dev/pci/ixgbe/ixgbe_x550.c
4585
s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.c
4586
u32 device_type, u16 phy_data)
sys/dev/pci/ixgbe/ixgbe_x550.c
4589
u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;
sys/dev/pci/ixgbe/ixgbe_x550.c
4618
u32 status;
sys/dev/pci/ixgbe/ixgbe_x550.c
4684
u32 status;
sys/dev/pci/ixgbe/ixgbe_x550.c
4740
s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx)
sys/dev/pci/ixgbe/ixgbe_x550.c
4765
s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx)
sys/dev/pci/ixgbe/ixgbe_x550.c
4827
ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
sys/dev/pci/ixgbe/ixgbe_x550.c
4854
u32 fwsm;
sys/dev/pci/ixgbe/ixgbe_x550.c
502
u32 (*data)[FW_PHY_ACT_DATA_COUNT])
sys/dev/pci/ixgbe/ixgbe_x550.c
52
static s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *, u32 mask);
sys/dev/pci/ixgbe/ixgbe_x550.c
522
rc = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd,
sys/dev/pci/ixgbe/ixgbe_x550.c
53
static void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *, u32 mask);
sys/dev/pci/ixgbe/ixgbe_x550.c
561
u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/pci/ixgbe/ixgbe_x550.c
623
u32 setup[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/pci/ixgbe/ixgbe_x550.c
629
static s32 ixgbe_read_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.c
630
u32 device_type, u16 *phy_data)
sys/dev/pci/ixgbe/ixgbe_x550.c
636
static s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.c
637
u32 device_type, u16 phy_data)
sys/dev/pci/ixgbe/ixgbe_x550.c
810
u32 setup[FW_PHY_ACT_DATA_COUNT] = { 0 };
sys/dev/pci/ixgbe/ixgbe_x550.c
846
setup[0] |= (u32)(ixgbe_fw_map[i].fw_speed);
sys/dev/pci/ixgbe/ixgbe_x550.h
103
s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.h
104
u32 device_type, u16 *phy_data);
sys/dev/pci/ixgbe/ixgbe_x550.h
105
s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.h
106
u32 device_type, u16 phy_data);
sys/dev/pci/ixgbe/ixgbe_x550.h
121
s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx);
sys/dev/pci/ixgbe/ixgbe_x550.h
122
s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx);
sys/dev/pci/ixgbe/ixgbe_x550.h
49
s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size);
sys/dev/pci/ixgbe/ixgbe_x550.h
66
s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.h
67
u32 device_type, u32 data);
sys/dev/pci/ixgbe/ixgbe_x550.h
68
s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.h
69
u32 device_type, u32 *data);
sys/dev/pci/ixgbe/ixgbe_x550.h
74
s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.h
75
u32 device_type, u32 data);
sys/dev/pci/ixgbe/ixgbe_x550.h
76
s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
sys/dev/pci/ixgbe/ixgbe_x550.h
77
u32 device_type, u32 *data);
sys/dev/pci/ixgbe/ixgbe_x550.h
80
void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap);
sys/dev/pci/ixgbe/ixgbe_x550.h
81
void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf);
sys/dev/pci/ixgbe/ixgbe_x550.h
97
s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);
sys/dev/pci/ixgbe/ixgbe_x550.h
98
void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);
sys/dev/pci/ixgbe/ixv.c
123
static u8 * ixv_mc_array_itr(struct ixgbe_hw *, u8 **, u32 *);
sys/dev/pci/ixgbe/ixv.c
1250
ixv_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)
sys/dev/pci/ixgbe/ixv.c
1730
u32 txctrl, txdctl;
sys/dev/pci/ixgbe/ixv.c
1775
u32 reta = 0, mrqc, rss_key[10];
sys/dev/pci/ixgbe/ixv.c
1778
u32 rss_hash_config;
sys/dev/pci/ixgbe/ixv.c
1875
u32 bufsz, psrtype;
sys/dev/pci/ixgbe/ixv.c
1902
u32 reg, rxdctl;
sys/dev/pci/ixgbe/ixv.c
2118
u32 ctrl;
sys/dev/pci/ixgbe/ixv.c
2151
u32 vid, vfta, retry;
sys/dev/pci/ixgbe/ixv.c
2183
sc->shadow_vfta[idx] |= (u32)1 << (vlanidp->vid % 32);
sys/dev/pci/ixgbe/ixv.c
2202
if ((vfta & ((u32)1 << j)) == 0)
sys/dev/pci/ixgbe/ixv.c
2271
sc->shadow_vfta[index] |= ((u32)1 << bit);
sys/dev/pci/ixgbe/ixv.c
2301
sc->shadow_vfta[index] &= ~((u32)1 << bit);
sys/dev/pci/ixgbe/ixv.c
2321
u32 mask;
sys/dev/pci/ixgbe/ixv.c
2370
u32 ivar, index;
sys/dev/pci/ixgbe/ixv.c
2383
ivar |= ((u32)vector << index);
sys/dev/pci/ixgbe/ixv.c
2439
u32 current = IXGBE_READ_REG(hw, (reg)); \
sys/dev/pci/ixgbe/ixv.c
830
ixv_enable_queue(struct ixgbe_softc *sc, u32 vector)
sys/dev/pci/ixgbe/ixv.c
834
u32 queue = 1UL << vector;
sys/dev/pci/ixgbe/ixv.c
835
u32 mask;
sys/dev/pci/ixgbe/ixv.c
851
ixv_disable_queue(struct ixgbe_softc *sc, u32 vector)
sys/dev/pci/ixgbe/ixv.c
855
u32 queue = 1UL << vector;
sys/dev/pci/ixgbe/ixv.c
856
u32 mask;
sys/dev/pci/ixgbe/ixv.c
872
u32 mask = (IXGBE_EIMS_RTX_QUEUE & queues);
sys/dev/pci/ixgbe/ixv.c
889
u32 newitr = 0;
sys/dev/pci/xmm7360.c
1067
u32 val;
sys/dev/pci/xmm7360.c
1072
if (copy_to_user((u32*)arg, &val, sizeof(u32)))
sys/dev/pci/xmm7360.c
1189
static int xmm7360_mux_control(struct xmm_net *xn, u32 arg1, u32 arg2, u32 arg3, u32 arg4)
sys/dev/pci/xmm7360.c
1212
u32 unknown = 0;
sys/dev/pci/xmm7360.c
1242
u32 status;
sys/dev/pci/xmm7360.c
381
u32 extra;
sys/dev/pci/xmm7360.c
382
u32 unk, flags;
sys/dev/pci/xmm7360.c
398
u32 unk;
sys/dev/pci/xmm7360.c
416
u32 code;
sys/dev/pci/xmm7360.c
417
u32 mode;
sys/dev/pci/xmm7360.c
418
u32 asleep;
sys/dev/pci/xmm7360.c
419
u32 pad;
sys/dev/pci/xmm7360.c
430
volatile u32 s_wptr[16], s_rptr[16];
sys/dev/pci/xmm7360.c
432
volatile u32 c_wptr, c_rptr;
sys/dev/pci/xmm7360.c
60
#define XMM7360_IOCTL_GET_PAGE_SIZE _IOC(_IOC_READ, 'x', 0xc0, sizeof(u32))
sys/dev/pci/xmm7360.c
618
static int xmm7360_cmd_ring_execute(struct xmm_dev *xmm, u8 cmd, u8 parm, u16 len, dma_addr_t ptr, u32 extra)
sys/kern/kern_ctf.c
162
uint32_t *u32 = (uint32_t *) ctfaddr;
sys/kern/kern_ctf.c
171
sz = u32[CTF_HDR_STRTAB_U32] + u32[CTF_HDR_STRLEN_U32] +
sys/net/if_spppsubr.c
1667
uint32_t u32;
sys/net/if_spppsubr.c
1817
memcpy(&u32, h + 1, sizeof u32);
sys/net/if_spppsubr.c
1818
if (ntohl(u32) == sp->lcp.magic) {
sys/net/if_spppsubr.c
1833
u32 = htonl(sp->lcp.magic);
sys/net/if_spppsubr.c
1834
memcpy(h + 1, &u32, sizeof u32);
sys/net/if_spppsubr.c
1852
memcpy(&u32, h + 1, sizeof u32);
sys/net/if_spppsubr.c
1853
if (ntohl(u32) != sp->lcp.magic)
sys/net80211/ieee80211_crypto_tkip.c
234
uint32_t iv32 = (b0 << 0) | (b1 << 8) | (b2 << 16) | ((u32)b3 << 24);
sys/net80211/ieee80211_crypto_tkip.c
443
static __inline u16 Lo16(u32 val)
sys/net80211/ieee80211_crypto_tkip.c
448
static __inline u16 Hi16(u32 val)
sys/net80211/ieee80211_crypto_tkip.c
506
static void tkip_mixing_phase1(u16 *TTAK, const u8 *TK, const u8 *TA, u32 IV32)
sys/net80211/ieee80211_crypto_tkip.c
581
u32 i, j, k, crc;
sys/net80211/ieee80211_crypto_tkip.c
641
u32 i, j, k, crc;
sys/net80211/ieee80211_crypto_tkip.c
703
static __inline u32 rotl(u32 val, int bits)
sys/net80211/ieee80211_crypto_tkip.c
709
static __inline u32 rotr(u32 val, int bits)
sys/net80211/ieee80211_crypto_tkip.c
715
static __inline u32 xswap(u32 val)
sys/net80211/ieee80211_crypto_tkip.c
734
static __inline u32 get_le32_split(u8 b0, u8 b1, u8 b2, u8 b3)
sys/net80211/ieee80211_crypto_tkip.c
736
return b0 | (b1 << 8) | (b2 << 16) | ((u32)b3 << 24);
sys/net80211/ieee80211_crypto_tkip.c
739
static __inline u32 get_le32(const u8 *p)
sys/net80211/ieee80211_crypto_tkip.c
745
static __inline void put_le32(u8 *p, u32 v)
sys/net80211/ieee80211_crypto_tkip.c
796
u32 l, r;
sys/net80211/ieee80211_crypto_tkip.c
886
(u32)(key->wk_keytsc >> 16));
sys/net80211/ieee80211_crypto_tkip.c
913
u32 iv32;
sys/net80211/ieee80211_crypto_tkip.c
921
iv32 = (u32) (ctx->rx_rsc >> 16);
sys/net80211/ieee80211_crypto_tkip.c
923
if (iv32 != (u32)(key->wk_keyrsc >> 16) || !ctx->rx_phase1_done) {
sys/net80211/ieee80211_crypto_tkip.c
933
if (iv32 != (u32)(key->wk_keyrsc >> 16)) {
sys/sys/epoll.h
69
uint32_t u32;
sys/ufs/ext2fs/ext2fs_vfsops.c
1353
uint32_t u32;
sys/ufs/ext2fs/ext2fs_vfsops.c
1393
u32 = fs->e2fs_bcount - fs->e2fs_first_dblock; /* > 0 */
sys/ufs/ext2fs/ext2fs_vfsops.c
1394
m_fs->e2fs_ncg = howmany(u32, fs->e2fs_bpg);
sys/ufs/ext2fs/ext2fs_vfsops.c
1416
if ((u32 = (m_fs->e2fs_bsize >> m_fs->e2fs_group_desc_shift)) == 0) {
sys/ufs/ext2fs/ext2fs_vfsops.c
1421
m_fs->e2fs_ngdb = howmany(m_fs->e2fs_ncg, u32);
sys/ufs/ext2fs/ext2fs_vfsops.c
1444
u32 = fs->e2fs_features_incompat & ~EXT2F_INCOMPAT_SUPP;
sys/ufs/ext2fs/ext2fs_vfsops.c
1445
if (u32) {
sys/ufs/ext2fs/ext2fs_vfsops.c
1446
snprintb(buf, sizeof(buf), EXT2F_INCOMPAT_BITS, u32);
sys/ufs/ext2fs/ext2fs_vfsops.c
1453
u32 = fs->e2fs_features_rocompat & ~EXT2F_ROCOMPAT_SUPP;
sys/ufs/ext2fs/ext2fs_vfsops.c
1454
if (!ronly && u32) {
sys/ufs/ext2fs/ext2fs_vfsops.c
1455
snprintb(buf, sizeof(buf), EXT2F_ROCOMPAT_BITS, u32);
tests/lib/libbluetooth/t_sdp_get.c
161
uuid_t u32 = {
tests/lib/libbluetooth/t_sdp_get.c
188
ATF_CHECK(uuid_equal(&value, &u32, NULL));
tests/lib/libbluetooth/t_sdp_put.c
124
const uuid_t u32 = {
tests/lib/libbluetooth/t_sdp_put.c
142
ATF_REQUIRE(sdp_put_uuid(&test, &u32));
tests/lib/libc/sys/t_ptrace_x86_wait.h
2184
uint32_t u32;
tests/lib/libc/sys/t_ptrace_x86_wait.h
2246
: "=a"(out[0].u32), "=b"(out[1].u32), "=c"(out[2].u32),
tests/lib/libc/sys/t_ptrace_x86_wait.h
2247
"=d"(out[3].u32), "=S"(out[4].u32), "=D"(out[5].u32)
tests/lib/libc/sys/t_ptrace_x86_wait.h
2261
: "a"(data[0].u32), "b"(data[1].u32), "c"(data[2].u32),
tests/lib/libc/sys/t_ptrace_x86_wait.h
2262
"d"(data[3].u32), "S"(data[4].u32), "D"(data[5].u32)
tests/lib/libc/sys/t_ptrace_x86_wait.h
2288
: "=r"(out[0].u32), "=r"(out[1].u32)
tests/lib/libc/sys/t_ptrace_x86_wait.h
2312
: "ri"(data[0].u32), "ri"(data[1].u32)
tests/lib/libc/sys/t_ptrace_x86_wait.h
3281
FORKEE_ASSERT_MEMEQ(&vals[5].u32,
tests/lib/libc/sys/t_ptrace_x86_wait.h
3282
&expected[5].u32, sizeof(vals->u32));
tests/lib/libc/sys/t_ptrace_x86_wait.h
3283
FORKEE_ASSERT_MEMEQ(&vals[4].u32,
tests/lib/libc/sys/t_ptrace_x86_wait.h
3284
&expected[4].u32, sizeof(vals->u32));
tests/lib/libc/sys/t_ptrace_x86_wait.h
3285
FORKEE_ASSERT_MEMEQ(&vals[3].u32,
tests/lib/libc/sys/t_ptrace_x86_wait.h
3286
&expected[3].u32, sizeof(vals->u32));
tests/lib/libc/sys/t_ptrace_x86_wait.h
3287
FORKEE_ASSERT_MEMEQ(&vals[2].u32,
tests/lib/libc/sys/t_ptrace_x86_wait.h
3288
&expected[2].u32, sizeof(vals->u32));
tests/lib/libc/sys/t_ptrace_x86_wait.h
3291
FORKEE_ASSERT_MEMEQ(&vals[1].u32,
tests/lib/libc/sys/t_ptrace_x86_wait.h
3292
&expected[1].u32, sizeof(vals->u32));
tests/lib/libc/sys/t_ptrace_x86_wait.h
3293
FORKEE_ASSERT_MEMEQ(&vals[0].u32,
tests/lib/libc/sys/t_ptrace_x86_wait.h
3294
&expected[0].u32, sizeof(vals->u32));
tests/lib/libc/sys/t_ptrace_x86_wait.h
3694
ATF_CHECK_EQ((uint32_t)gpr.r_eax, expected[0].u32);
tests/lib/libc/sys/t_ptrace_x86_wait.h
3695
ATF_CHECK_EQ((uint32_t)gpr.r_ebx, expected[1].u32);
tests/lib/libc/sys/t_ptrace_x86_wait.h
3696
ATF_CHECK_EQ((uint32_t)gpr.r_ecx, expected[2].u32);
tests/lib/libc/sys/t_ptrace_x86_wait.h
3697
ATF_CHECK_EQ((uint32_t)gpr.r_edx, expected[3].u32);
tests/lib/libc/sys/t_ptrace_x86_wait.h
3698
ATF_CHECK_EQ((uint32_t)gpr.r_esi, expected[4].u32);
tests/lib/libc/sys/t_ptrace_x86_wait.h
3699
ATF_CHECK_EQ((uint32_t)gpr.r_edi, expected[5].u32);
tests/lib/libc/sys/t_ptrace_x86_wait.h
3704
ATF_CHECK_EQ((uint32_t)gpr.r_esp, expected[0].u32);
tests/lib/libc/sys/t_ptrace_x86_wait.h
3705
ATF_CHECK_EQ((uint32_t)gpr.r_ebp, expected[1].u32);
tests/lib/libc/sys/t_ptrace_x86_wait.h
3973
gpr.r_eax = expected[0].u32;
tests/lib/libc/sys/t_ptrace_x86_wait.h
3974
gpr.r_ebx = expected[1].u32;
tests/lib/libc/sys/t_ptrace_x86_wait.h
3975
gpr.r_ecx = expected[2].u32;
tests/lib/libc/sys/t_ptrace_x86_wait.h
3976
gpr.r_edx = expected[3].u32;
tests/lib/libc/sys/t_ptrace_x86_wait.h
3977
gpr.r_esi = expected[4].u32;
tests/lib/libc/sys/t_ptrace_x86_wait.h
3978
gpr.r_edi = expected[5].u32;
tests/lib/libc/sys/t_ptrace_x86_wait.h
3983
gpr.r_esp = expected[0].u32;
tests/lib/libc/sys/t_ptrace_x86_wait.h
3984
gpr.r_ebp = expected[1].u32;
tests/usr.bin/xlint/lint1/expr.c
11
unsigned u32: 32;
tests/usr.bin/xlint/lint1/expr.c
20
return bits.u32 < ul ? bits.u32 : ul;
tests/usr.bin/xlint/lint1/gcc_attribute_aligned.c
80
unsigned u32 __attribute__((__aligned__(32)));
tests/usr.bin/xlint/lint1/msg_117.c
13
unsigned u32;
tests/usr.bin/xlint/lint1/msg_117.c
37
u32 = u8 << 0;
tests/usr.bin/xlint/lint1/msg_117.c
38
u32 = u8 << 23;
tests/usr.bin/xlint/lint1/msg_117.c
40
u32 = u8 << 24;
tests/usr.bin/xlint/lint1/msg_117.c
41
u32 = u8 << 31;
tests/usr.bin/xlint/lint1/msg_117.c
43
u32 = u8 << 32;
tests/usr.bin/xlint/lint1/msg_117.c
47
u32 = s32 << 0;
tests/usr.bin/xlint/lint1/msg_117.c
48
u32 = s32 << 23;
tests/usr.bin/xlint/lint1/msg_117.c
49
u32 = s32 << 24;
tests/usr.bin/xlint/lint1/msg_117.c
50
u32 = s32 << 31;
tests/usr.bin/xlint/lint1/msg_117.c
52
u32 = s32 << 32;
tests/usr.bin/xlint/lint1/msg_117.c
56
u32 = u32 << 0;
tests/usr.bin/xlint/lint1/msg_117.c
57
u32 = u32 << 23;
tests/usr.bin/xlint/lint1/msg_117.c
58
u32 = u32 << 24;
tests/usr.bin/xlint/lint1/msg_117.c
59
u32 = u32 << 31;
tests/usr.bin/xlint/lint1/msg_117.c
61
u32 = u32 << 32;
tests/usr.bin/xlint/lint1/msg_117.c
63
u64 = u32 << 32;
tests/usr.bin/xlint/lint1/msg_132.c
107
s64 = u32;
tests/usr.bin/xlint/lint1/msg_132.c
126
u32 = s8;
tests/usr.bin/xlint/lint1/msg_132.c
127
u32 = s16;
tests/usr.bin/xlint/lint1/msg_132.c
129
u32 = s64;
tests/usr.bin/xlint/lint1/msg_132.c
227
u8 = u32 >> 24 & 0xff;
tests/usr.bin/xlint/lint1/msg_132.c
228
u8 = u32 >> 16 & 0xff;
tests/usr.bin/xlint/lint1/msg_132.c
229
u8 = u32 >> 8 & 0xff;
tests/usr.bin/xlint/lint1/msg_132.c
230
u8 = u32 & 0xff;
tests/usr.bin/xlint/lint1/msg_132.c
241
u32 = u16 * u16;
tests/usr.bin/xlint/lint1/msg_132.c
243
u32 = u16 * 65537ULL;
tests/usr.bin/xlint/lint1/msg_132.c
245
u32 = u16 * 65538ULL;
tests/usr.bin/xlint/lint1/msg_132.c
253
u32 = (u16 & 1023ULL) / 1ULL * 1024ULL | (u16 & 1023ULL) / 1ULL * 1ULL;
tests/usr.bin/xlint/lint1/msg_132.c
286
u16 = u32 / 65536;
tests/usr.bin/xlint/lint1/msg_132.c
288
u16 = u32 / 65535;
tests/usr.bin/xlint/lint1/msg_132.c
31
u32_t u32;
tests/usr.bin/xlint/lint1/msg_132.c
365
u32 = s32 + 0x80000000;
tests/usr.bin/xlint/lint1/msg_132.c
384
u16 = u32 % 0x00010000 + 0x80000000 + 0x80000000;
tests/usr.bin/xlint/lint1/msg_132.c
387
u16 = u32 % 0x00010000 + 0xffff8000;
tests/usr.bin/xlint/lint1/msg_132.c
389
s16 = u32 % 0x00010000 + 0xffff8000;
tests/usr.bin/xlint/lint1/msg_132.c
396
u16 = u32 % 0x00010000 + 0xffff0000 + 0x00010000;
tests/usr.bin/xlint/lint1/msg_132.c
423
u32 = s32 - -0x80000000;
tests/usr.bin/xlint/lint1/msg_132.c
440
u32 = u16 << 16;
tests/usr.bin/xlint/lint1/msg_132.c
442
u32 = u16 << 17;
tests/usr.bin/xlint/lint1/msg_132.c
454
u64 = u32 << 32;
tests/usr.bin/xlint/lint1/msg_132.c
455
u64 = (u64_t)u32 << 32;
tests/usr.bin/xlint/lint1/msg_132.c
457
u64 = (u64_t)u32 << 33;
tests/usr.bin/xlint/lint1/msg_132.c
466
u32 = u64 >> 32;
tests/usr.bin/xlint/lint1/msg_132.c
468
u32 = u64 >> 31;
tests/usr.bin/xlint/lint1/msg_132.c
470
u16 = u32 >> 16;
tests/usr.bin/xlint/lint1/msg_132.c
472
u8 = u32 >> 24;
tests/usr.bin/xlint/lint1/msg_132.c
489
u8 = u16 & u32;
tests/usr.bin/xlint/lint1/msg_132.c
502
s32 = (u32 ^ 0x80000000) - 0x80000000;
tests/usr.bin/xlint/lint1/msg_132.c
513
u16 = u8 | u32;
tests/usr.bin/xlint/lint1/msg_132.c
514
u32 = u8 | u32;
tests/usr.bin/xlint/lint1/msg_132.c
516
u32 = u8 | u64;
tests/usr.bin/xlint/lint1/msg_132.c
54
unsigned u32:32;
tests/usr.bin/xlint/lint1/msg_132.c
564
u16 = (u32 & 0x0000ff00);
tests/usr.bin/xlint/lint1/msg_132.c
565
u16 = (u32_t)(u32 & 0x0000ff00);
tests/usr.bin/xlint/lint1/msg_132.c
566
u16 = (u16_t)u32;
tests/usr.bin/xlint/lint1/msg_132.c
567
u16 = (u8_t)(u32 & 0xffff) << 8;
tests/usr.bin/xlint/lint1/msg_132.c
580
bits.u3 = bits.u32 & m;
tests/usr.bin/xlint/lint1/msg_132.c
583
bits.u32 = bits.u5 & m;
tests/usr.bin/xlint/lint1/msg_132.c
586
return bits.u32 & m;
tests/usr.bin/xlint/lint1/msg_132.c
597
unsigned u32:15;
tests/usr.bin/xlint/lint1/msg_132.c
608
b = s.u32 == 0;
tests/usr.bin/xlint/lint1/msg_132.c
64
u8 = u32;
tests/usr.bin/xlint/lint1/msg_132.c
644
return 0xc0 | (u32 & 0x07c0) / 64;
tests/usr.bin/xlint/lint1/msg_132.c
70
u16 = u32;
tests/usr.bin/xlint/lint1/msg_132.c
74
u32 = u8;
tests/usr.bin/xlint/lint1/msg_132.c
75
u32 = u16;
tests/usr.bin/xlint/lint1/msg_132.c
77
u32 = u64;
tests/usr.bin/xlint/lint1/msg_132.c
81
u64 = u32;
tests/usr.bin/xlint/lint1/msg_132.c
90
s8 = u32;
tests/usr.bin/xlint/lint1/msg_132.c
96
s16 = u32;
tests/usr.bin/xlint/lint1/msg_132_lp64.c
11
u32_t u32;
tests/usr.bin/xlint/lint1/msg_132_lp64.c
25
u32 = ptr + 3 - ptr;
tests/usr.bin/xlint/lint1/msg_141.c
103
u32 = -0x00000000U;
tests/usr.bin/xlint/lint1/msg_141.c
104
u32 = -0x7fffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
105
u32 = -0x80000000U;
tests/usr.bin/xlint/lint1/msg_141.c
106
u32 = -0xffffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
12
unsigned int u32;
tests/usr.bin/xlint/lint1/msg_141.c
156
u32 = 0xffffU * 0x10001U; // +0xffffffff
tests/usr.bin/xlint/lint1/msg_141.c
158
u32 = 0x10000U * 0x10000U; // +0x0100000000
tests/usr.bin/xlint/lint1/msg_141.c
211
u32 = 0xffffffffU / -1U;
tests/usr.bin/xlint/lint1/msg_141.c
212
u32 = 0xffffffffU / 1U;
tests/usr.bin/xlint/lint1/msg_141.c
214
u32 = 0U / 0U;
tests/usr.bin/xlint/lint1/msg_141.c
216
u32 = 0xffffffffU / 0U;
tests/usr.bin/xlint/lint1/msg_141.c
30
u32 = ~0x00000000U;
tests/usr.bin/xlint/lint1/msg_141.c
31
u32 = ~0x7fffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
32
u32 = ~0x80000000U;
tests/usr.bin/xlint/lint1/msg_141.c
320
u32 = 0x00000000U + 0x00000000U;
tests/usr.bin/xlint/lint1/msg_141.c
321
u32 = 0x40000000U + 0x40000000U;
tests/usr.bin/xlint/lint1/msg_141.c
322
u32 = 0xffffffffU + 0x00000000U;
tests/usr.bin/xlint/lint1/msg_141.c
323
u32 = 0x00000000U + 0xffffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
324
u32 = 0xfffffffeU + 0x00000001U;
tests/usr.bin/xlint/lint1/msg_141.c
326
u32 = 0xffffffffU + 0x00000001U;
tests/usr.bin/xlint/lint1/msg_141.c
328
u32 = 0x00000001U + 0xffffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
33
u32 = ~0xffffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
330
u32 = 0xffffffffU + 0xffffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
377
u32 = 0x00000000U - 0x00000000U;
tests/usr.bin/xlint/lint1/msg_141.c
379
u32 = 0x00000000U - 0x00000001U;
tests/usr.bin/xlint/lint1/msg_141.c
381
u32 = 0x00000000U - 0x80000000U;
tests/usr.bin/xlint/lint1/msg_141.c
382
u32 = 0x80000000U - 0x00000001U;
tests/usr.bin/xlint/lint1/msg_141.c
384
u32 = 0x00000000U - 0xffffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
385
u32 = 0xffffffffU - 0x00000000U;
tests/usr.bin/xlint/lint1/msg_141.c
386
u32 = 0xffffffffU - 0xffffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
436
u32 = 0x0100U << 23;
tests/usr.bin/xlint/lint1/msg_141.c
438
u32 = 0x0100U << 24;
tests/usr.bin/xlint/lint1/msg_141.c
440
u32 = 0x0000U << -1;
tests/usr.bin/xlint/lint1/msg_141.c
442
u32 = 0x0100U << 0x0100U;
tests/usr.bin/xlint/lint1/msg_141.c
444
u32 = 0x0100U << 0xffffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
446
u32 = 0x0100U << 0xffffffffffffffffULL;
tests/usr.bin/xlint/lint1/msg_141.c
490
u32 = 0xffffffffU >> 1;
tests/usr.bin/xlint/lint1/msg_141.c
492
u32 = 0xffffffffU >> 32;
tests/usr.bin/xlint/lint1/msg_141.c
493
u32 = 0x00000000U >> 1;
tests/usr.bin/xlint/lint1/msg_141.c
570
u32 = 0xffffffffU & 0x55555555U;
tests/usr.bin/xlint/lint1/msg_141.c
571
u32 = 0x55555555U & 0xaaaaaaaaU;
tests/usr.bin/xlint/lint1/msg_141.c
595
u32 = 0xffffffffU ^ 0x55555555U;
tests/usr.bin/xlint/lint1/msg_141.c
596
u32 = 0x55555555U ^ 0xaaaaaaaaU;
tests/usr.bin/xlint/lint1/msg_141.c
620
u32 = 0xffffffffU | 0x00000000U;
tests/usr.bin/xlint/lint1/msg_141.c
621
u32 = 0xffffffffU | 0xffffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
622
u32 = 0x55555555U | 0xaaaaaaaaU;
tests/usr.bin/xlint/lint1/msg_141.c
66
u32 = +0x00000000U;
tests/usr.bin/xlint/lint1/msg_141.c
67
u32 = +0x7fffffffU;
tests/usr.bin/xlint/lint1/msg_141.c
68
u32 = +0x80000000U;
tests/usr.bin/xlint/lint1/msg_141.c
69
u32 = +0xffffffffU;
tests/usr.bin/xlint/lint1/msg_218.c
11
unsigned int u32;
tests/usr.bin/xlint/lint1/msg_218.c
44
cond = u32 < 3000000000L;
tests/usr.bin/xlint/lint1/msg_218.c
47
cond = 3000000000L < u32;
tests/usr.bin/xlint/lint1/msg_222.c
14
unsigned int u32;
tests/usr.bin/xlint/lint1/msg_222.c
23
u32 = !-8;
tests/usr.bin/xlint/lint1/msg_222.c
24
u32 = ~-8;
tests/usr.bin/xlint/lint1/msg_222.c
26
u32 = +-8;
tests/usr.bin/xlint/lint1/msg_222.c
27
u32 = - -8;
tests/usr.bin/xlint/lint1/msg_222.c
30
u32 = u32 * -8;
tests/usr.bin/xlint/lint1/msg_222.c
32
u32 = -8 * u32;
tests/usr.bin/xlint/lint1/msg_222.c
34
u32 = u32 / -8;
tests/usr.bin/xlint/lint1/msg_222.c
36
u32 = -8 / u32;
tests/usr.bin/xlint/lint1/msg_222.c
38
u32 = u32 % -8;
tests/usr.bin/xlint/lint1/msg_222.c
40
u32 = -8 / u32;
tests/usr.bin/xlint/lint1/msg_222.c
42
u32 = u32 + -8;
tests/usr.bin/xlint/lint1/msg_222.c
44
u32 = -8 + u32;
tests/usr.bin/xlint/lint1/msg_222.c
46
u32 = u32 - -8;
tests/usr.bin/xlint/lint1/msg_222.c
48
u32 = -8 - u32;
tests/usr.bin/xlint/lint1/msg_222.c
50
u32 = u32 << -8;
tests/usr.bin/xlint/lint1/msg_222.c
51
u32 = -8 << u32;
tests/usr.bin/xlint/lint1/msg_222.c
53
u32 = u32 >> -8;
tests/usr.bin/xlint/lint1/msg_222.c
54
u32 = -8 >> u32;
tests/usr.bin/xlint/lint1/msg_222.c
57
b = u32 < -8;
tests/usr.bin/xlint/lint1/msg_222.c
59
b = u32 <= -8;
tests/usr.bin/xlint/lint1/msg_222.c
61
b = u32 > -8;
tests/usr.bin/xlint/lint1/msg_222.c
63
b = u32 >= -8;
tests/usr.bin/xlint/lint1/msg_222.c
65
b = u32 == -8;
tests/usr.bin/xlint/lint1/msg_222.c
67
b = u32 != -8;
tests/usr.bin/xlint/lint1/msg_222.c
69
u32 = u32 & -8;
tests/usr.bin/xlint/lint1/msg_222.c
70
u32 = u32 ^ -8;
tests/usr.bin/xlint/lint1/msg_222.c
71
u32 = u32 | -8;
tests/usr.bin/xlint/lint1/msg_222.c
72
b = u32 && -8;
tests/usr.bin/xlint/lint1/msg_222.c
73
b = u32 || -8;
tests/usr.bin/xlint/lint1/msg_222.c
76
u32 = -8;
tests/usr.bin/xlint/lint1/msg_222.c
78
u32 *= -8;
tests/usr.bin/xlint/lint1/msg_222.c
80
u32 /= -8;
tests/usr.bin/xlint/lint1/msg_222.c
82
u32 %= -8;
tests/usr.bin/xlint/lint1/msg_222.c
84
u32 += -8;
tests/usr.bin/xlint/lint1/msg_222.c
86
u32 -= -8;
tests/usr.bin/xlint/lint1/msg_222.c
88
u32 <<= -8;
tests/usr.bin/xlint/lint1/msg_222.c
90
u32 >>= -8;
tests/usr.bin/xlint/lint1/msg_222.c
91
u32 &= -8;
tests/usr.bin/xlint/lint1/msg_222.c
93
u32 ^= -8;
tests/usr.bin/xlint/lint1/msg_222.c
94
u32 |= -8;
tests/usr.bin/xlint/lint1/msg_309.c
15
u32_t u32;
tests/usr.bin/xlint/lint1/msg_357.c
26
examples(unsigned u32, uint64_t u64)
tests/usr.bin/xlint/lint1/msg_357.c
35
u32);
tests/usr.bin/xlint/lint1/msg_357.c
42
u32);
tests/usr.bin/xlint/lint1/msg_357.c
49
u32 & 0xffff);
tests/usr.bin/xlint/lint1/msg_358.c
26
examples(unsigned u32, uint64_t u64)
tests/usr.bin/xlint/lint1/msg_358.c
33
u32);
tests/usr.bin/xlint/lint1/msg_358.c
38
u32);
tests/usr.bin/xlint/lint1/msg_358.c
45
u32);
tests/usr.bin/xlint/lint1/msg_358.c
64
u32);
tests/usr.bin/xlint/lint1/msg_362.c
19
example(unsigned u32)
tests/usr.bin/xlint/lint1/msg_362.c
32
u32);
tests/usr.bin/xlint/lint1/msg_363.c
21
old_style_description(unsigned u32)
tests/usr.bin/xlint/lint1/msg_363.c
31
u32);
tests/usr.bin/xlint/lint1/msg_363.c
43
u32);
tests/usr.bin/xlint/lint1/msg_363.c
55
u32);
tests/usr.bin/xlint/lint1/msg_363.c
63
u32);
tests/usr.bin/xlint/lint1/msg_364.c
19
example(unsigned u32)
tests/usr.bin/xlint/lint1/msg_364.c
27
u32);
tests/usr.bin/xlint/lint1/msg_364.c
34
u32);
tests/usr.bin/xlint/lint1/msg_365.c
18
example(unsigned u32)
tests/usr.bin/xlint/lint1/msg_365.c
26
u32);
tests/usr.bin/xlint/lint1/msg_365.c
33
u32);
tests/usr.bin/xlint/lint1/msg_366.c
23
example(unsigned u32)
tests/usr.bin/xlint/lint1/msg_366.c
31
u32);
tests/usr.bin/xlint/lint1/msg_366.c
38
u32);
tests/usr.bin/xlint/lint1/msg_366.c
45
u32);
tests/usr.bin/xlint/lint1/msg_366.c
51
u32);
tests/usr.bin/xlint/lint1/msg_366.c
57
u32);
tests/usr.bin/xlint/lint1/msg_366.c
63
u32);
tests/usr.bin/xlint/lint1/msg_366.c
69
u32);
tests/usr.bin/xlint/lint1/msg_367.c
21
old_style(unsigned u32)
tests/usr.bin/xlint/lint1/msg_367.c
35
u32);
tests/usr.bin/xlint/lint1/msg_367.c
47
u32);
tests/usr.bin/xlint/lint1/msg_367.c
56
u32);
tests/usr.bin/xlint/lint1/msg_369.c
21
example(unsigned u32, uint64_t u64)
tests/usr.bin/xlint/lint1/msg_369.c
33
u32);
tests/usr.bin/xlint/lint1/msg_371.c
20
example(unsigned u32, uint64_t u64)
tests/usr.bin/xlint/lint1/msg_371.c
36
u32);
tests/usr.bin/xlint/lint1/msg_376.c
18
example(unsigned u32, uint64_t u64)
tests/usr.bin/xlint/lint1/msg_376.c
35
u32);
tests/usr.bin/xlint/lint1/msg_377.c
22
example(unsigned u32, uint64_t u64)
tests/usr.bin/xlint/lint1/msg_377.c
33
u32);
tests/usr.bin/xlint/lint1/msg_378.c
20
example(unsigned u32, uint64_t u64)
tests/usr.bin/xlint/lint1/msg_378.c
29
u32 >> 1);
tests/usr.bin/xlint/lint1/msg_378.c
50
(u32 & 0xaa55aa55) << 8);
tests/usr.bin/xlint/lint1/msg_381.c
26
u32 = -1.0;
tests/usr.bin/xlint/lint1/msg_381.c
27
u32 = -0.0;
tests/usr.bin/xlint/lint1/msg_381.c
28
u32 = 0.0;
tests/usr.bin/xlint/lint1/msg_381.c
30
u32 = 3.141;
tests/usr.bin/xlint/lint1/msg_381.c
31
u32 = 4294967295.0;
tests/usr.bin/xlint/lint1/msg_381.c
33
u32 = 4294967296.0;
tests/usr.bin/xlint/lint1/msg_381.c
9
unsigned int u32;
tests/usr.bin/xlint/lint1/platform_ilp32_int.c
13
unsigned int u32;
tests/usr.bin/xlint/lint1/platform_ilp32_int.c
27
u32 = ul32;
tests/usr.bin/xlint/lint1/platform_ilp32_int.c
28
ul32 = u32;
tests/usr.bin/xlint/lint1/platform_ilp32_long.c
17
unsigned int u32;
tests/usr.bin/xlint/lint1/platform_ilp32_long.c
36
u32 = ul32;
tests/usr.bin/xlint/lint1/platform_ilp32_long.c
37
ul32 = u32;
tests/usr.bin/xlint/lint1/platform_lp64.c
13
unsigned int u32;
tests/usr.bin/xlint/lint1/platform_lp64.c
26
u32 = ul32;
tests/usr.bin/xlint/lint1/platform_lp64.c
27
ul32 = u32;
tests/usr.bin/xlint/lint1/platform_lp64.c
45
u32 = u128;
tests/usr.bin/xlint/lint1/queries.c
110
u32 += u16;
tests/usr.bin/xlint/lint1/queries.c
121
u32 = u32 & 0xff;
tests/usr.bin/xlint/lint1/queries.c
122
u32 &= 0xff;
tests/usr.bin/xlint/lint1/queries.c
126
u32 = u32 & s32;
tests/usr.bin/xlint/lint1/queries.c
132
u32 &= s32;
tests/usr.bin/xlint/lint1/queries.c
137
u32 = u32 & u8;
tests/usr.bin/xlint/lint1/queries.c
429
u16 += u8, u32 += u16;
tests/usr.bin/xlint/lint1/queries.c
46
u32_t u32;
tests/usr.bin/xlint/lint1/queries.c
510
f32 = u32;
tests/usr.bin/xlint/lint1/queries.c
514
f64 = u32;
tests/usr.bin/xlint/lint1/queries.c
525
f64 = (double)u32;
tests/usr.bin/xlint/lint1/queries.c
58
unsigned u32:32;
tests/usr.bin/xlint/lint1/queries.c
590
u32 = -u32;
usr.bin/gzip/unxz.c
173
uint32_t u32[IO_BUFFER_SIZE / sizeof(uint32_t)];
usr.bin/gzip/unxz.c
307
if (buf.u32[i] != 0)
usr.bin/gzip/unxz.c
318
} while (i >= 0 && buf.u32[i] == 0);