tf_spsr
tf->tf_spsr &= ~NZCV_C;
tf->tf_spsr |= NZCV_C;
thumbmode = (tf->tf_spsr & SPSR_A32_T) ? true : false;
tf->tf_spsr = SPSR_M_EL0T;
{ "spsr", (long *) &ddb_regs.tf_spsr, FCN_NULL, NULL }
if (tf->tf_spsr & SPSR_A32) {
" (AArch32)\n", tf->tf_pc, tf->tf_spsr);
tf->tf_pc, tf->tf_spsr);
tf->tf_spsr = SPSR_M_EL0T;
const bool user = IS_SPSR_USER(tf->tf_spsr) ? true : false;
(tf->tf_spsr & SPSR_PAN))) {
": %s", strdisasm(tf->tf_pc, tf->tf_spsr));
regs->r_cpsr = tf->tf_spsr;
if (tf->tf_spsr & SPSR_A32_T)
tf->tf_spsr &= ~(SPSR_NZCV | SPSR_A32_T);
tf->tf_spsr |= regs->r_cpsr & (SPSR_NZCV | SPSR_A32_T);
tf->tf_spsr |= SPSR_A32_T;
tf->tf_spsr |= SPSR_A32_T;
tf->tf_spsr &= ~SPSR_A32_T;
gr[_REG_CPSR] = tf->tf_spsr;
tf->tf_spsr = gr[_REG_CPSR];
tf->tf_spsr = SPSR_M_USR32 | SPSR_A32_E;
tf->tf_spsr = SPSR_M_USR32;
tf->tf_spsr |= SPSR_A32_T;
lwp_trapframe(l)->tf_spsr |= SPSR_SS;
lwp_trapframe(l)->tf_spsr &= ~SPSR_SS;
tf->tf_spsr &= ~NZCV_C;
tf->tf_spsr |= NZCV_C;
tf->tf_spsr &= ~NZCV_C;
if (!(tf->tf_spsr & SPSR_I))
tf->tf_spsr &= ~SPSR_SS;
strdisasm(tf->tf_pc, tf->tf_spsr));
insn_size = fetch_arm_insn(tf->tf_pc, tf->tf_spsr, &insn);
if (tf->tf_spsr & SPSR_A32_T)
if (arm_cond_match(insn, tf->tf_spsr)) {
if (arm_cond_match(insn, tf->tf_spsr)) {
if (arm_cond_match(insn, tf->tf_spsr)) {
if (arm_cond_match(insn, tf->tf_spsr)) {
strdisasm(tf->tf_pc, tf->tf_spsr));
#define CLKF_USERMODE(cf) ((((cf)->cf_tf.tf_spsr) & 0x0f) == 0)
tf->tf_spsr = PSR_USR32_MODE;
tf->tf_spsr |= PSR_E_BIT;
tf->tf_spsr |= PSR_T_bit;
KASSERT(VALID_PSR(tf->tf_spsr));
KASSERT(VALID_PSR(lwp_trapframe(l)->tf_spsr));
tf->tf_spsr = context.sc_spsr;
frame.sf_sc.sc_spsr = tf->tf_spsr;
tf->tf_spsr |= PSR_T_bit;
tf->tf_spsr &= ~PSR_T_bit;
tf->tf_spsr = context.sc_spsr;
if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) {
(frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE)
if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) {
if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) {
(frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE)
if ((frame->tf_spsr & PSR_MODE) == PSR_SVC32_MODE) {
regs->r_cpsr = tf->tf_spsr;
KASSERT(VALID_PSR(tf->tf_spsr));
if (tf->tf_spsr & PSR_T_bit)
tf->tf_spsr &= ~(PSR_FLAGS | PSR_T_bit);
tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
tf->tf_spsr |= PSR_T_bit;
KASSERT(VALID_PSR(tf->tf_spsr));
tf->tf_spsr |= PSR_T_bit;
tf->tf_spsr &= ~PSR_T_bit;
tf->tf_spsr |= PSR_T_bit;
tf->tf_spsr &= ~PSR_T_bit;
gr[_REG_CPSR] = tf->tf_spsr;
tf->tf_spsr = gr[_REG_CPSR];
KASSERT(VALID_PSR(tf->tf_spsr));
restore_interrupts(tf->tf_spsr & IF32_bits);
if (tf->tf_spsr & PSR_T_bit) {
if (tf->tf_spsr & PSR_T_bit)
tf->tf_spsr &= ~PSR_C_bit; /* carry bit */
if (tf->tf_spsr & PSR_T_bit)
tf->tf_spsr |= PSR_C_bit; /* carry bit */
tf->tf_spsr &= ~PSR_C_bit; /* carry bit */
if (tf->tf_spsr & PSR_T_bit)
if (tf->tf_spsr & PSR_T_bit) {
if (!arm_cond_ok_p(__SHIFTIN(insn, INSN_COND_MASK), frame->tf_spsr)) {
if ((tf->tf_spsr & PSR_MODE) != PSR_USR32_MODE) {
restore_interrupts(tf->tf_spsr & IF32_bits);
if (tf->tf_spsr & PSR_T_bit)
if ((tf->tf_spsr & PSR_MODE) == PSR_USR32_MODE) {
if (tf->tf_spsr & PSR_T_bit) {
if ((tf->tf_spsr & PSR_T_bit) && !CPU_IS_ARMV7_P()) {
} else if ((tf->tf_spsr & PSR_T_bit) && !CPU_IS_ARMV7_P()) {
tf->tf_spsr = PSR_USR32_MODE;
tf->tf_spsr |= PSR_E_BIT;
tf->tf_spsr = PSR_USR32_MODE;
tf->tf_spsr |= PSR_E_BIT;
db_printf("spsr=%08x\n", frame->tf_spsr);
if (DDB_REGS->tf_spsr & PSR_T_bit) {
{ "spsr", XO(tf_spsr), ddb_reg_var, NULL },
tf->tf_spsr);
if (tf->tf_spsr & PSR_T_bit) {
KASSERT(!TRAP_USERMODE(tf) || VALID_PSR(tf->tf_spsr));
if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit))
restore_interrupts(tf->tf_spsr & IF32_bits);
if (__predict_true((tf->tf_spsr & IF32_bits) != IF32_bits))
restore_interrupts(tf->tf_spsr & IF32_bits);
if (__predict_false((tf->tf_spsr & PSR_MODE)==PSR_UND32_MODE)) {
if (__predict_false(tf->tf_spsr & PSR_T_bit)) {
printf("spsr=%08x\n", tf->tf_spsr);
printf("trapframe: %p, spsr=%08x\n", tf, tf->tf_spsr);
(tf->tf_spsr & PSR_MODE) == PSR_ABT32_MODE) {
tf->tf_spsr &= ~PSR_MODE;
tf->tf_spsr |= PSR_SVC32_MODE;
tf->tf_spsr |= PSR_USR32_MODE;
tf->tf_spsr &= ~PSR_T_bit;
tf->tf_spsr |= PSR_T_bit;
if (tf->tf_spsr & PSR_T_bit) {
KASSERT(!user || VALID_PSR(tf->tf_spsr));
if (__predict_true((tf->tf_spsr & I32_bit) != I32_bit))
restore_interrupts(tf->tf_spsr & IF32_bits);
if (__predict_true((tf->tf_spsr & IF32_bits) != IF32_bits))
restore_interrupts(tf->tf_spsr & IF32_bits);
KASSERT(!TRAP_USERMODE(tf) || VALID_PSR(tf->tf_spsr));
if ((tf->tf_spsr & PSR_T_bit) &&
KASSERT(!TRAP_USERMODE(tf) || VALID_PSR(tf->tf_spsr));
gdb_regs[KGDB_REGNUM_SPSR] = regs->tf_spsr;
regs->tf_spsr = gdb_regs[KGDB_REGNUM_SPSR];
#define CLKF_USERMODE(cf) (((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_USR32_MODE)
((cf)->cf_tf.tf_spsr & PSR_MODE) == PSR_UND32_MODE)
register_t tf_spsr;
#define TRAP_USERMODE(tf) (((tf)->tf_spsr & PSR_MODE) == PSR_USR32_MODE)
frame->cf_tf.tf_spsr |= I32_bit;
frame->cf_tf.tf_spsr &= ~I32_bit;
frame.sf_sc.sc_cpsr = tf->tf_spsr;
tf->tf_spsr = frame.sf_sc.sc_cpsr;