t8
p = t0+y*t1+tt+y*y*(t2+y*(t3+y*(t4+y*(t5+y*(t6+y*(t7+y*(t8+
t8 = 6.10053602051788840313573150785080958e-03L,
p = t0+y*t1+tt+y*y*(t2+y*(t3+y*(t4+y*(t5+y*(t6+y*(t7+y*(t8+
t8 = 2.25964780900612472250e-03, /* 0x3F6282D3, 0x2E15C915 */
p3 = t2+w*(t5+w*(t8+w*(t11+w*t14)));
p3 = t2+w*(t5+w*(t8+w*(t11+w*t14)));
t8 = 2.2596477065e-03, /* 0x3b141699 */
DBREG(t8, FRAME_T8),
#define MIPS_CURLWP t8 /* needs to synced with cpu.h */
uint8_t *t8;
t8 = (uint8_t *)((vaddr_t)pcb + PAGE_SIZE - MAX_FRAME);
for (j = 0; *t8++ == 0x5a; j++)
t8 = y5 & y1;
t9 = t8 ^ t7;
uint32_t t0, t1, t2, t3, t4, t5, t6, t7, t8, t9;
t8 = y5 & y1;
t9 = t8 ^ t7;
uint64_t t0, t1, t2, t3, t4, t5, t6, t7, t8, t9;
aes_neon_xts_update(uint8x16_t t8)
t = vreinterpretq_s32_u8(t8);
t8 = y5 & y1;
t9 = t8 ^ t7;
__m128i t0, t1, t2, t3, t4, t5, t6, t7, t8, t9;