sys/arch/sgimips/hpc/if_sq.c

1060

sq_hpc_write(sc, sc->hpc_regs->enetr_ndbp,

sys/arch/sgimips/hpc/if_sq.c

1064

sq_hpc_write(sc, sc->hpc_regs->enetr_ctl,

sys/arch/sgimips/hpc/if_sq.c

1183

sq_hpc_write(sc, HPC1_ENETX_CFXBP, reclaimto);

sys/arch/sgimips/hpc/if_sq.c

1184

sq_hpc_write(sc, HPC1_ENETX_CBP, reclaimto);

sys/arch/sgimips/hpc/if_sq.c

1187

sq_hpc_write(sc, HPC1_ENETX_CTL, HPC1_ENETX_CTL_ACTIVE);

sys/arch/sgimips/hpc/if_sq.c

1234

sq_hpc_write(sc, HPC3_ENETX_NDBP,

sys/arch/sgimips/hpc/if_sq.c

1238

sq_hpc_write(sc, HPC3_ENETX_CTL,

sys/arch/sgimips/hpc/if_sq.c

1273

sq_hpc_write(sc, sc->hpc_regs->enetr_ctl, 0);

sys/arch/sgimips/hpc/if_sq.c

1274

sq_hpc_write(sc, sc->hpc_regs->enetx_ctl, 0);

sys/arch/sgimips/hpc/if_sq.c

1276

sq_hpc_write(sc, sc->hpc_regs->enetr_reset, 3);

sys/arch/sgimips/hpc/if_sq.c

1278

sq_hpc_write(sc, sc->hpc_regs->enetr_reset, 0);

sys/arch/sgimips/hpc/if_sq.c

456

sq_hpc_write(sc, HPC3_ENETR_PIOCFG, pioreg);

sys/arch/sgimips/hpc/if_sq.c

457

sq_hpc_write(sc, HPC3_ENETR_DMACFG, dmareg);

sys/arch/sgimips/hpc/if_sq.c

461

sq_hpc_write(sc, sc->hpc_regs->enetr_ndbp, SQ_CDRXADDR(sc, 0));

sys/arch/sgimips/hpc/if_sq.c

464

sq_hpc_write(sc, sc->hpc_regs->enetr_ctl,

sys/arch/sgimips/hpc/if_sq.c

472

sq_hpc_write(sc, HPC1_ENET_INTDELAY, HPC1_ENET_INTDELAY_OFF);

sys/arch/sgimips/hpc/if_sq.c

794

sq_hpc_write(sc, HPC3_ENETX_NDBP, SQ_CDTXADDR(sc,

sys/arch/sgimips/hpc/if_sq.c

798

sq_hpc_write(sc, HPC3_ENETX_CTL, HPC3_ENETX_CTL_ACTIVE);

sys/arch/sgimips/hpc/if_sq.c

811

sq_hpc_write(sc, HPC1_ENETX_NDBP,

sys/arch/sgimips/hpc/if_sq.c

813

sq_hpc_write(sc, HPC1_ENETX_CFXBP,

sys/arch/sgimips/hpc/if_sq.c

815

sq_hpc_write(sc, HPC1_ENETX_CBP,

sys/arch/sgimips/hpc/if_sq.c

819

sq_hpc_write(sc, HPC1_ENETX_CTL,

sys/arch/sgimips/hpc/if_sq.c

918

sq_hpc_write(sc, sc->hpc_regs->enetr_reset, (stat | 2));