sm_ddr2
(s->sm_ddr2.ddr2_mod_attrs & SPDMEM_DDR2_MASK_REG)?
dimm_size = 1 << (s->sm_ddr2.ddr2_rows + s->sm_ddr2.ddr2_cols - 17);
dimm_size *= (s->sm_ddr2.ddr2_ranks + 1) *
s->sm_ddr2.ddr2_banks_per_chip;
cycle_time = s->sm_ddr2.ddr2_cycle_whole * 1000 +
spdmem_cycle_frac[s->sm_ddr2.ddr2_cycle_frac];
bits = s->sm_ddr2.ddr2_datawidth;
s->sm_ddr2.ddr2_rows, s->sm_ddr2.ddr2_cols,
s->sm_ddr2.ddr2_ranks + 1, s->sm_ddr2.ddr2_banks_per_chip,
if (s->sm_ddr2.ddr2_tCAS & (1 << i))
((scale * s->sm_ddr2.field + cycle_time - 1) / cycle_time)