sdmmc_io_read_1
rv = sdmmc_io_read_1(sf, addr);
tplcode = sdmmc_io_read_1(sf0, reg++);
tpllen = sdmmc_io_read_1(sf0, reg++);
switch (sdmmc_io_read_1(sf0, reg)) {
sprom->srom_rev = sdmmc_io_read_1(sf0, reg + 1);
sdmmc_io_read_1(sf0, reg + 1) |
((uint16_t)sdmmc_io_read_1(sf0, reg + 2) << 8);
sdmmc_io_read_1(sf0, reg + 1);
sdmmc_io_read_1(sf0, reg + 1) |
((uint16_t)sdmmc_io_read_1(sf0, reg + 2) << 8);
sdmmc_io_read_1(sf0, reg + 3) |
((uint16_t)sdmmc_io_read_1(sf0, reg + 4) << 8);
sdmmc_io_read_1(sf0, reg + 5) |
((uint16_t)sdmmc_io_read_1(sf0, reg + 6) << 8);
sdmmc_io_read_1(sf0, reg + 7);
sdmmc_io_read_1(sf0, reg + 8);
sdmmc_io_read_1(sf0, reg + 1);
sprom->ant_gain = sdmmc_io_read_1(sf0, reg + 1);
sdmmc_io_read_1(sf0, reg + 1) |
((uint16_t)sdmmc_io_read_1(sf0, reg + 2) << 8);
sprom->gpio[0] = sdmmc_io_read_1(sf0, reg + 1);
sprom->gpio[1] = sdmmc_io_read_1(sf0, reg + 2);
sprom->gpio[2] = sdmmc_io_read_1(sf0, reg + 3);
sprom->gpio[3] = sdmmc_io_read_1(sf0, reg + 4);
#define CSR_READ_1(sc, reg) sdmmc_io_read_1((sc)->sc_sf, (reg))
if (sdmmc_io_read_1(sf0, reg++) != 6) {
cis->lan_nid[i] = sdmmc_io_read_1(sf0, reg++);
sdiox_cccrx = sdmmc_io_read_1(sf0, SD_IO_CCCR_CCCR_SDIO_REV);
max_blk_size = sdmmc_io_read_1(sf0, reg + 11);
max_blk_size |= sdmmc_io_read_1(sf0, reg + 12) << 8;
cis->cis1_major = sdmmc_io_read_1(sf0, reg++);
cis->cis1_minor = sdmmc_io_read_1(sf0, reg++);
ch = sdmmc_io_read_1(sf0, reg + i);
tplcode = sdmmc_io_read_1(sf0, reg++);
tpllen = sdmmc_io_read_1(sf0, reg++);
sdmmc_io_read_1(sf0, reg + i)));
switch (sdmmc_io_read_1(sf0, reg++)) {
cis->function = sdmmc_io_read_1(sf0, reg);
cis->manufacturer = sdmmc_io_read_1(sf0, reg++);
cis->manufacturer |= sdmmc_io_read_1(sf0, reg++) << 8;
cis->product = sdmmc_io_read_1(sf0, reg++);
cis->product |= sdmmc_io_read_1(sf0, reg++) << 8;
cisptr |= sdmmc_io_read_1(sf, SD_IO_CCCR_CISPTR + 0) << 0;
cisptr |= sdmmc_io_read_1(sf, SD_IO_CCCR_CISPTR + 1) << 8;
cisptr |= sdmmc_io_read_1(sf, SD_IO_CCCR_CISPTR + 2) << 16;
cisptr |= sdmmc_io_read_1(sf0, SD_IO_FBR(num) + 9) << 0;
cisptr |= sdmmc_io_read_1(sf0, SD_IO_FBR(num) + 10) << 8;
cisptr |= sdmmc_io_read_1(sf0, SD_IO_FBR(num) + 11) << 16;
fn0_blk_size = sdmmc_io_read_1(sf0, reg++);
fn0_blk_size |= sdmmc_io_read_1(sf0, reg++) << 8;
max_tran_speed = sdmmc_io_read_1(sf0, reg++);
reg = sdmmc_io_read_1(sf, SD_IO_CCCR_CAPABILITY);
reg = sdmmc_io_read_1(sf, SD_IO_CCCR_HIGH_SPEED);
reg = sdmmc_io_read_1(sf0, SD_IO_FBR(sf->number) + 0x000);
sdmmc_io_read_1(sf0, SD_IO_FBR(sf->number) + 0x001);
reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_IOREADY);
reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE);
reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE);
reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN);
reg = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_INTEN);
uint8_t sdmmc_io_read_1(struct sdmmc_function *, int);