Symbol: sc_iobase
sys/arch/acorn32/mainbus/pioc.c
222
pa.pa_iobase = sc->sc_iobase;
sys/arch/acorn32/mainbus/pioc.c
296
sc->sc_iobase = mb->mb_iobase;
sys/arch/acorn32/mainbus/pioc.c
299
if (bus_space_map(iot, sc->sc_iobase, PIOC_SIZE, 0, &ioh))
sys/arch/acorn32/mainbus/pioc.c
376
pa.pa_iobase = sc->sc_iobase;
sys/arch/acorn32/mainbus/pioc.c
395
pa.pa_iobase = sc->sc_iobase;
sys/arch/acorn32/mainbus/pioc.c
421
pa.pa_iobase = sc->sc_iobase;
sys/arch/acorn32/mainbus/pioc.c
446
pa.pa_iobase = sc->sc_iobase;
sys/arch/acorn32/mainbus/pioc.c
475
pa.pa_iobase = sc->sc_iobase;
sys/arch/acorn32/mainbus/pioc.c
75
bus_addr_t sc_iobase; /* IO base address */
sys/arch/acorn32/podulebus/cosc.c
128
sc->sc_iobase = (vu_char *)sc->sc_podule->fast_base;
sys/arch/acorn32/podulebus/cosc.c
132
sc->sc_iobase[COSC_PAGE_REGISTER] = 0;
sys/arch/acorn32/podulebus/cosc.c
137
rp->term = &sc->sc_iobase[COSC_TERMINATION_CONTROL];
sys/arch/acorn32/podulebus/cosc.c
139
esc = &sc->sc_iobase[COSC_ESCOFFSET_BASE];
sys/arch/acorn32/podulebus/cosc.c
175
if (sc->sc_iobase[COSC_CONFIG_TERMINATION] & COSC_CONFIG_TERMINATION_ON) {
sys/arch/acorn32/podulebus/cosc.c
177
sc->sc_iobase[COSC_TERMINATION_CONTROL] = COSC_TERMINATION_ON;
sys/arch/acorn32/podulebus/cosc.c
180
sc->sc_iobase[COSC_TERMINATION_CONTROL] = COSC_TERMINATION_OFF;
sys/arch/acorn32/podulebus/cosc.c
189
byte = sc->sc_iobase[COSC_REGISTER_01];
sys/arch/acorn32/podulebus/cosc.c
192
if (sc->sc_iobase[COSC_REGISTER_00] & 0x01)
sys/arch/acorn32/podulebus/cosc.c
205
sc->sc_softc.sc_config4 = sc->sc_iobase[COSC_CONFIG_CONTROL_REG4];
sys/arch/acorn32/podulebus/cosc.c
218
sc->sc_softc.sc_host_id = sc->sc_iobase[COSC_CONFIG_CONTROL_REG1] & ESC_DEST_ID_MASK;
sys/arch/acorn32/podulebus/coscvar.h
44
vu_char *sc_iobase;
sys/arch/acorn32/podulebus/csc.c
113
sc->sc_specific.sc_iobase =
sys/arch/acorn32/podulebus/csc.c
116
rp->status0 = &sc->sc_specific.sc_iobase[CSC_STATUS0];
sys/arch/acorn32/podulebus/csc.c
117
rp->alatch = &sc->sc_specific.sc_iobase[CSC_ALATCH];
sys/arch/acorn32/podulebus/csc.c
118
rp->dack = (vu_short *)&sc->sc_specific.sc_iobase[CSC_DACK];
sys/arch/acorn32/podulebus/csc.c
119
fas = &sc->sc_specific.sc_iobase[CSC_FAS_OFFSET_BASE];
sys/arch/acorn32/podulebus/cscvar.h
41
vu_char *sc_iobase;
sys/arch/acorn32/podulebus/if_ie.c
126
int sc_iobase;
sys/arch/acorn32/podulebus/if_ie.c
329
sc->sc_iobase = sc->sc_podule->sync_base; /* OBSOLETE */
sys/arch/acorn32/podulebus/ptsc.c
153
sc->sc_specific.sc_iobase =
sys/arch/acorn32/podulebus/ptsc.c
156
rp->chipreset = &sc->sc_specific.sc_iobase[PTSC_CONTROL_CHIPRESET];
sys/arch/acorn32/podulebus/ptsc.c
157
rp->inten = &sc->sc_specific.sc_iobase[PTSC_CONTROL_INTEN];
sys/arch/acorn32/podulebus/ptsc.c
158
rp->status = &sc->sc_specific.sc_iobase[PTSC_STATUS];
sys/arch/acorn32/podulebus/ptsc.c
159
rp->term = &sc->sc_specific.sc_iobase[PTSC_CONTROL_TERM];
sys/arch/acorn32/podulebus/ptsc.c
160
rp->led = &sc->sc_specific.sc_iobase[PTSC_CONTROL_LED];
sys/arch/acorn32/podulebus/ptsc.c
161
fas = &sc->sc_specific.sc_iobase[PTSC_FASOFFSET_BASE];
sys/arch/acorn32/podulebus/ptscvar.h
41
vu_char *sc_iobase;
sys/arch/arc/dti/btl.c
1043
sc->sc_iobase = iobase;
sys/arch/arc/dti/btl.c
1066
int iobase = sc->sc_iobase;
sys/arch/arc/dti/btl.c
1140
int iobase = sc->sc_iobase;
sys/arch/arc/dti/btl.c
115
int sc_iobase;
sys/arch/arc/dti/btl.c
1352
int iobase = sc->sc_iobase;
sys/arch/arc/dti/btl.c
355
sc->sc_iobase = ia->ia_iobase;
sys/arch/arc/dti/btl.c
509
int iobase = sc->sc_iobase;
sys/arch/arc/dti/btl.c
745
int iobase = sc->sc_iobase;
sys/arch/atari/vme/et4000.c
121
int sc_iobase;
sys/arch/atari/vme/et4000.c
362
sc->sc_iobase = va->va_iobase;
sys/arch/atari/vme/et4000.c
432
g_display.gd_regaddr = (void *) (sc->sc_iobase);
sys/arch/atari/vme/et4000.c
475
return m68k_btop(sc->sc_iobase + offset);
sys/arch/evbsh3/ap_ms104_sh4/shpcmcia.c
185
bus_addr_t sc_iobase;
sys/arch/evbsh3/ap_ms104_sh4/shpcmcia.c
270
sc->sc_iobase = sc->sc_ioh;
sys/arch/hppa/dev/elroy.c
1355
sc->sc_iobase = 0xfee00000;
sys/arch/hppa/dev/elroy.c
343
if ((error = bus_space_map(sc->sc_bt, bpa + sc->sc_iobase, size,
sys/arch/hppa/dev/elroy.c
386
rstart += sc->sc_iobase;
sys/arch/hppa/dev/elroy.c
387
rend += sc->sc_iobase;
sys/arch/hppa/dev/elroyvar.h
33
bus_addr_t sc_iobase;
sys/arch/i386/pnpbios/ess_pnpbios.c
99
pnpbios_getiobase(aa->pbt, aa->resc, 0, 0, &sc->sc_iobase);
sys/arch/i386/pnpbios/sb_pnpbios.c
88
pnpbios_getiobase(aa->pbt, aa->resc, 0, 0, &sc->sc_iobase);
sys/arch/mips/alchemy/dev/aupci.c
177
sc->sc_iobase = PCI_IO_BASE;
sys/arch/mips/alchemy/dev/aupci.c
242
sc->sc_iobase, AUPCI_IO_START, AUPCI_IO_END,
sys/arch/mips/alchemy/dev/aupci.c
85
paddr_t sc_iobase;
sys/arch/sun3/dev/if_ie.c
221
pa = (vaddr_t)ptr - (vaddr_t)sc->sc_iobase;
sys/arch/sun3/dev/if_ie_obio.c
120
sc->sc_iobase = (void *)DVMA_OBIO_SLAVE_BASE;
sys/arch/sun3/dev/if_ie_obio.c
143
sc->scp = (volatile void *)((char *)sc->sc_iobase + IE_SCP_ADDR);
sys/arch/sun3/dev/if_ie_sebuf.c
131
sc->sc_iobase = aa->buf - 0x20000;
sys/arch/sun3/dev/if_ie_vme.c
155
sc->sc_iobase = sc->sc_maddr;
sys/arch/sun3/dev/if_ievar.h
75
void *sc_iobase; /* KVA of base of 24bit addr space */
sys/arch/x68k/dev/mha.c
318
sc->sc_iobase = (void *)IIOV(ia->ia_addr + 0x80); /* XXX */
sys/arch/x68k/dev/mha.c
323
sc->sc_pc = (volatile u_char *)sc->sc_iobase;
sys/arch/x68k/dev/mha.c
324
sc->sc_ps = (volatile u_short *)sc->sc_iobase;
sys/arch/x68k/dev/mhavar.h
86
volatile void *sc_iobase;
sys/dev/ic/i82586var.h
176
void *sc_iobase; /* (MD) KVA of base of 24 bit addr space */
sys/dev/ic/wevar.h
28
int sc_iobase; /* i/o address */
sys/dev/isa/ad1848var.h
91
int sc_iobase;
sys/dev/isa/addcom_isa.c
197
sc->sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/addcom_isa.c
206
iobase = sc->sc_iobase
sys/dev/isa/addcom_isa.c
222
ca.ca_iobase = sc->sc_iobase
sys/dev/isa/addcom_isa.c
87
int sc_iobase;
sys/dev/isa/ast.c
156
sc->sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/ast.c
159
iobase = sc->sc_iobase + i * COM_NPORTS;
sys/dev/isa/ast.c
178
ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
sys/dev/isa/ast.c
59
int sc_iobase;
sys/dev/isa/atppc_isa.c
144
sc->sc_iobase = ia->ia_io->ir_addr;
sys/dev/isa/atppc_isa.c
146
if (bus_space_map(lsc->sc_iot, sc->sc_iobase, IO_LPTSIZE, 0,
sys/dev/isa/atppc_isa.c
71
int sc_iobase;
sys/dev/isa/boca.c
162
sc->sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/boca.c
165
iobase = sc->sc_iobase + i * COM_NPORTS;
sys/dev/isa/boca.c
180
ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
sys/dev/isa/boca.c
62
int sc_iobase;
sys/dev/isa/ess.c
279
sc->sc_iobase, sc->out_port,
sys/dev/isa/ess.c
363
iobase = sc->sc_iobase;
sys/dev/isa/ess.c
807
if (!ESS_BASE_VALID(sc->sc_iobase)) {
sys/dev/isa/ess.c
808
printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase);
sys/dev/isa/ess_isa.c
140
sc->sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/ess_isa.c
141
if (bus_space_map(sc->sc_iot, sc->sc_iobase, ESS_NPORT, 0,
sys/dev/isa/ess_isa.c
144
"size %x\n", sc->sc_iobase, ESS_NPORT));
sys/dev/isa/ess_isa.c
84
sc->sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/ess_isa.c
85
if (bus_space_map(sc->sc_iot, sc->sc_iobase, ESS_NPORT, 0,
sys/dev/isa/ess_isa.c
88
"size %x\n", sc->sc_iobase, ESS_NPORT));
sys/dev/isa/essvar.h
141
int sc_iobase; /* I/O port base address */
sys/dev/isa/gus.c
259
int sc_iobase; /* I/O base address */
sys/dev/isa/gus.c
2914
port = sc->sc_iobase;
sys/dev/isa/gus.c
2928
sc->sc_codec.sc_iobase = port+GUS_MAX_CODEC_BASE;
sys/dev/isa/gus.c
2930
if (ad1848_isa_mapprobe(&sc->sc_codec, sc->sc_codec.sc_iobase) == 0) {
sys/dev/isa/gus.c
851
sc->sc_iobase = iobase;
sys/dev/isa/if_ai.c
198
(u_long)sc->sc_maddr - (u_long)sc->sc_iobase);
sys/dev/isa/if_ai.c
356
sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
sys/dev/isa/if_ai.c
442
sc->sc_iobase = (char *)memh + size - (1 << 24);
sys/dev/isa/if_ef.c
298
addr + (u_long)sc->sc_maddr - (u_long)sc->sc_iobase);
sys/dev/isa/if_ef.c
545
sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
sys/dev/isa/if_ix.c
360
int val = addr + (u_long)sc->sc_maddr - (u_long)sc->sc_iobase;
sys/dev/isa/if_ix.c
791
sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
sys/dev/isa/ioat66.c
155
sc->sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/ioat66.c
59
int sc_iobase;
sys/dev/isa/moxa_isa.c
154
sc->sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/moxa_isa.c
157
iobase = sc->sc_iobase + i * COM_NPORTS;
sys/dev/isa/moxa_isa.c
171
ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
sys/dev/isa/moxa_isa.c
59
int sc_iobase;
sys/dev/isa/pas.c
385
sc->sc_sbdsp.sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/pas.c
470
sc->sc_sbdsp.sc_iobase = iobase;
sys/dev/isa/rtfps.c
158
sc->sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/rtfps.c
168
iobase = sc->sc_iobase + i * COM_NPORTS;
sys/dev/isa/rtfps.c
189
ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
sys/dev/isa/rtfps.c
59
int sc_iobase;
sys/dev/isa/sb_isa.c
119
sc->sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/sbdsp.c
265
sc->sc_iobase, sc->sc_irq);
sys/dev/isa/sbdsp.c
345
bus_space_write_1(iot, ioh, 0, sc->sc_iobase & 0x70);
sys/dev/isa/sbdspvar.h
104
int sc_iobase; /* I/O port base address */
sys/dev/isa/tcom.c
196
sc->sc_iobase = ia->ia_io[0].ir_addr;
sys/dev/isa/tcom.c
199
iobase = sc->sc_iobase + i * COM_NPORTS;
sys/dev/isa/tcom.c
209
if (bus_space_map(iot, sc->sc_iobase + STATUS_OFFSET, STATUS_SIZE, 0,
sys/dev/isa/tcom.c
219
ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
sys/dev/isa/tcom.c
98
int sc_iobase;
sys/dev/isapnp/ess_isapnp.c
113
sc->sc_iobase = ipa->ipa_io[0].base;
sys/dev/isapnp/sb_isapnp.c
122
sc->sc_iobase = ipa->ipa_io[0].base;
sys/dev/mca/if_elmc_mca.c
202
sc->sc_iobase = (char *)sc->sc_maddr + sc->sc_msize - (1 << 24);
sys/dev/mca/if_elmc_mca.c
337
(u_long) sc->sc_maddr - (u_long) sc->sc_iobase);
sys/dev/mvme/if_ie_mvme.c
117
scp_addr = sc->scp + (u_int) sc->sc_iobase;
sys/dev/mvme/if_ie_mvme.c
210
addr += (int) sc->sc_iobase;
sys/dev/mvme/if_ie_mvme.c
267
sc->sc_iobase = (void *) seg.ds_addr;
sys/dev/ofisa/ess_ofisa.c
140
sc->sc_iobase = reg.addr;
sys/dev/ofisa/ess_ofisa.c
141
if (bus_space_map(sc->sc_iot, sc->sc_iobase, reg.len, 0,
sys/dev/ofisa/sb_ofisa.c
140
sc->sc_iobase = reg.addr;