sc_data
sc->sc_data = (uint8_t *)pa->pa_podule->slow_base + CSA_DATA_OFFSET;
volatile uint8_t *sc_data;
uint64_t sc_data;
sc->sc_data = data;
switch (SMC_ERROR(sc->sc_data)) {
len = MIN(len, (sc->sc_data >> 16) & 0xffff);
uint32_t tmp = (sc->sc_data >> 32);
if (bus_space_map(sc->sc_bst, sc->sc_data, SMC_SRAM_SIZE, 0,
*sc->sc_data++ = at91twi_readreg(sc, TWI_RHR);
at91twi_writereg(sc, TWI_THR, *sc->sc_data++);
*sc->sc_data++ = at91twi_readreg(sc, TWI_RHR);
sc->sc_data = data;
at91twi_writereg(sc, TWI_THR, *sc->sc_data++);
u_char *sc_data;
const struct sunxi_hdmiphy_data *sc_data;
sc->sc_data = of_compatible_lookup(phandle, compat_data)->data;
sc->sc_data->init(sc);
return sc->sc_data->config(sc, mode->crtc_clock * 1000);
sc->sc_data = NULL;
sc->sc_data = bp->b_data;
virt = (vaddr_t)sc->sc_data;
sc->sc_data += count;
char *sc_data;
sc->sc_data = read_4(sc, VRC2_EXGPDATA);
if (sc->sc_data != data) {
data = (data & ~sc->sc_data)|(~data & sc->sc_data);
sc->sc_data = data;
u_int32_t sc_data;
ki2c_writereg(sc, DATA, *sc->sc_data++);
*sc->sc_data++ = ki2c_readreg(sc, DATA);
ki2c_writereg(sc, DATA, *sc->sc_data++);
sc->sc_data = data;
u_char *sc_data;
ingenic_efuse_read(sc, 8, 0x20, sc->sc_data);
ingenic_set_enaddr(&sc->sc_data[0x1a]);
printf(" %02x", sc->sc_data[i + j]);
uint8_t sc_data[0x20];
bus_space_tag_t sc_data;
bus_space_tag_t sc_data; /* data line */
pnpbus_io_map(&pna->pna_res, 1, &sc->sc_data, &sc->sc_datah)) {
sc->sc_mksc.sc_data = sc->sc_data;
return bus_space_read_1(sc->sc_data, sc->sc_datah, 0);
bus_space_write_1(sc->sc_data, sc->sc_datah, 0, val);
datum = bus_space_read_1(sc->sc_data, sc->sc_datah, 0);
bus_space_write_1(sc->sc_data, sc->sc_datah, 0, datum);
*fdc->sc_data =
*fdc->sc_data);
fdc->sc_data++;
fdc->sc_data = (char *)bp->b_data + fd->sc_skip;
*fdc->sc_data =
*fdc->sc_data);
fdc->sc_data++;
fdc->sc_data = (char *)bp->b_data + fd->sc_skip;
*fdc->sc_data++ = *fdc->sc_reg_fifo;
*fdc->sc_reg_fifo = *fdc->sc_data++;
fdc->sc_data = (char *)bp->b_data + fd->sc_skip;
volatile uint32_t *sc_data; /* KVA of ioapic data */
val = *sc->sc_data;
*(sc->sc_data) = val;
sc->sc_data = (volatile uint32_t *)(bh + IOAPIC_DATA);
sc->sc_data = acpi_compatible_lookup(aa, compat_data)->data;
if (bus_space_map(sc->sc_iot, sc->sc_data->aoss_base,
sc->sc_data->aoss_size, BUS_SPACE_MAP_NONPOSTED, &sc->sc_aoss_ioh)) {
if (bus_space_map(sc->sc_iot, sc->sc_data->cpucp_rx_base,
sc->sc_data->cpucp_rx_size, BUS_SPACE_MAP_NONPOSTED,
if (bus_space_map(sc->sc_iot, sc->sc_data->cpucp_tx_base,
sc->sc_data->cpucp_tx_size, BUS_SPACE_MAP_NONPOSTED,
sc->sc_aoss_ipcc = qcipcc_channel(sc->sc_data->aoss_client_id,
sc->sc_data->aoss_signal_id);
scmi_shmem = AcpiOsMapMemory(sc->sc_data->cpucp_shmem_base,
sc->sc_data->cpucp_shmem_size);
const struct qcpep_data *sc_data;
(sc)->sc_data->regs[obj] + (reg))
(sc)->sc_data->regs[obj] + (reg), (val))
const struct qcspmi_data *sc_data;
sc->sc_data = acpi_compatible_lookup(aa, compat_data)->data;
sc->sc_ee = sc->sc_data->ee;
nadb_register(sc, sc->sc_free, i, sc->sc_data[3]);
nadb_register(sc, i, i, sc->sc_data[3]);
memcpy(sc->sc_data, data, len);
uint8_t sc_data[16];
sc->sc_data = kmem_alloc(MAXPHYS, KM_SLEEP);
kmem_free(sc->sc_data, MAXPHYS);
data = sc->sc_data;
if (data == sc->sc_data) {
void *sc_data; /* emergency buffer */
sc->sc_data = GPIO_PIN_INPUT;
gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, pin, sc->sc_data);
int sc_data;
sc->sc_data = GPIO_PIN_OUTPUT;
sc->sc_data |= GPIO_PIN_OPENDRAIN;
sc->sc_data |= GPIO_PIN_PUSHPULL;
sc->sc_data |= GPIO_PIN_PULLUP;
gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA, sc->sc_data);
int data = sc->sc_data;
if (sc->sc_data != data) {
sc->sc_data = data;
sc->sc_data);
int data = sc->sc_data;
if (sc->sc_data != data) {
sc->sc_data = data;
sc->sc_data);
int sc_data;
kbd->sc_data = *ud;
hidkbd_decode(kbd, &kbd->sc_data);
struct hidkbd_data sc_data; /* for quirk handling */
sc->sc_addr, NULL, 0, sc->sc_data, sizeof(sc->sc_data), 0);
sc->sc_data[0], sc->sc_data[1],
sc->sc_data[2], sc->sc_data[3]));
if (!(sc->sc_data[0] &
memcpy(sc->sc_last, sc->sc_data,
sc->sc_addr, NULL, 0, sc->sc_data, sizeof(sc->sc_data), 0);
sc->sc_data[0], sc->sc_data[1],
sc->sc_data[2], sc->sc_data[3]));
if (!(sc->sc_data[0] &
memcpy(sc->sc_last, sc->sc_data,
memcpy(sc->sc_data, sc->sc_last,
sizeof(sc->sc_data));
hyg = (sc->sc_data[0] << 8) | sc->sc_data[1];
temp = HYTP14_TEMP_RAWVAL((sc->sc_data[2] << 8) | sc->sc_data[3]);
uint8_t sc_data[4]; /* current sensor data */
uint16_t *sc_data;
sc_data = (uint16_t *)sc;
for (i = 0; i < 32; i++, sc_data++) {
*sc_data = ahc_inb(ahc, SRAM_BASE + j)
void *sc_data; /* MD-specific data */
uint16_t *sc_data;
sc_data = (uint16_t *)sc;
*sc_data++ = ahd_inw_scbram(ahd, SCB_BASE+i);
uint16_t *sc_data;
sc_data = (uint16_t *)sc;
printf("\n\t0x%.4x", sc_data[i]);
(uint16_t *)sc->sc_data, psize / sizeof(uint16_t));
sc->sc_data[psize - 1] = MALO_READ_1(sc, MALO_REG_DATA_READ);
rxdesc = (struct malo_rx_desc *)sc->sc_data;
data = sc->sc_data + rxdesc->pkgoffset;
m = m_devget(sc->sc_data + rxdesc->pkgoffset,
struct malo_tx_desc *txdesc = (struct malo_tx_desc *)sc->sc_data;
memset(sc->sc_data, 0, sizeof(*txdesc));
m_copydata(m, 0, m->m_pkthdr.len, sc->sc_data + sizeof(*txdesc));
(uint16_t *)sc->sc_data, psize / sizeof(uint16_t));
data = sc->sc_data;
sc->sc_data = malloc(MALO_DATA_BUFFER_SIZE, M_DEVBUF, M_WAITOK);
if (sc->sc_data != NULL)
free(sc->sc_data, M_DEVBUF);
uint8_t *sc_data;
struct ukbd_data sc_data[MAXPENDING];
sc->sc_data[sc->sc_data_w] = *ud;
sc->sc_data[sc->sc_data_w] = *ud;
ukbd_decode(sc, &sc->sc_data[sc->sc_data_r]);
data = sc->sc_data[key];
sc->sc_data[key] = NULL;
data = sc->sc_data[key];
return (sc->sc_data[key]);
sc->sc_data[key] = data;
sc->sc_data[key] = data;
memcpy(newsc->sc_data, sc->sc_data,
newsc->sc_data[key] = data;
void * sc_data[]; /* variable length */