sys/dev/pci/if_rtwn.c

1378

reg = rtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0));

sys/dev/pci/if_rtwn.c

1382

reg = rtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1));

sys/dev/pci/if_rtwn.c

1415

reg = rtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0));

sys/dev/pci/if_rtwn.c

1423

reg = rtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1));

sys/dev/pci/if_rtwn.c

2707

reg = rtwn_bb_read(sc, R92C_FPGA0_TXINFO);

sys/dev/pci/if_rtwn.c

2711

reg = rtwn_bb_read(sc, R92C_FPGA1_TXINFO);

sys/dev/pci/if_rtwn.c

2715

reg = rtwn_bb_read(sc, R92C_CCK0_AFESETTING);

sys/dev/pci/if_rtwn.c

2719

reg = rtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA);

sys/dev/pci/if_rtwn.c

2723

reg = rtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1);

sys/dev/pci/if_rtwn.c

2727

reg = rtwn_bb_read(sc, 0xe74);

sys/dev/pci/if_rtwn.c

2730

reg = rtwn_bb_read(sc, 0xe78);

sys/dev/pci/if_rtwn.c

2733

reg = rtwn_bb_read(sc, 0xe7c);

sys/dev/pci/if_rtwn.c

2736

reg = rtwn_bb_read(sc, 0xe80);

sys/dev/pci/if_rtwn.c

2739

reg = rtwn_bb_read(sc, 0xe88);

sys/dev/pci/if_rtwn.c

2751

if (rtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) &

sys/dev/pci/if_rtwn.c

2780

reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx));

sys/dev/pci/if_rtwn.c

2784

reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i));

sys/dev/pci/if_rtwn.c

2789

reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i));

sys/dev/pci/if_rtwn.c

2794

reg = rtwn_bb_read(sc, R92C_HSSI_PARAM2(i));

sys/dev/pci/if_rtwn.c

2798

reg = rtwn_bb_read(sc, R92C_HSSI_PARAM2(i));

sys/dev/pci/if_rtwn.c

2820

reg = rtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx));

sys/dev/pci/if_rtwn.c

2922

reg = rtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32);

sys/dev/pci/if_rtwn.c

2925

reg = rtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11);

sys/dev/pci/if_rtwn.c

2931

reg = rtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32);

sys/dev/pci/if_rtwn.c

2936

reg = rtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11);

sys/dev/pci/if_rtwn.c

3126

rtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ);

sys/dev/pci/if_rtwn.c

3128

rtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ);

sys/dev/pci/if_rtwn.c

3131

reg = rtwn_bb_read(sc, R92C_CCK0_SYSTEM);

sys/dev/pci/if_rtwn.c

3135

reg = rtwn_bb_read(sc, R92C_OFDM1_LSTF);

sys/dev/pci/if_rtwn.c

3140

rtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) &

sys/dev/pci/if_rtwn.c

3143

reg = rtwn_bb_read(sc, 0x818);

sys/dev/pci/if_rtwn.c

3157

rtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ);

sys/dev/pci/if_rtwn.c

3159

rtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ);

sys/dev/pci/if_rtwn.c

3162

rtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) |

sys/dev/pci/if_rtwn.c

3356

reg = rtwn_bb_read(sc, R92C_FPGA0_RFMOD);

sys/dev/pci/if_rtwn.c

3359

reg = rtwn_bb_read(sc, R92C_FPGA0_RFMOD);

sys/dev/pci/if_rtwn.c

841

reg[0] = rtwn_bb_read(sc, R92C_HSSI_PARAM2(0));

sys/dev/pci/if_rtwn.c

843

reg[chain] = rtwn_bb_read(sc, R92C_HSSI_PARAM2(chain));

sys/dev/pci/if_rtwn.c

858

if (rtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI)

sys/dev/pci/if_rtwn.c

859

val = rtwn_bb_read(sc, R92C_HSPI_READBACK(chain));

sys/dev/pci/if_rtwn.c

861

val = rtwn_bb_read(sc, R92C_LSSI_READBACK(chain));