regw
regw(sc, CRTC_H_TOTAL_DISP, crtc->h_total_disp);
regw(sc, CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid);
regw(sc, CRTC_V_TOTAL_DISP, crtc->v_total_disp);
regw(sc, CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid);
regw(sc, CRTC_VLINE_CRNT_VLINE, 0);
regw(sc, CRTC_OFF_PITCH, (sc->stride >> 3) << 22);
regw(sc, CRTC_GEN_CNTL, crtc->gen_cntl | crtc->color_depth |
regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) & ~GUI_ENGINE_ENABLE);
regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) | GUI_ENGINE_ENABLE);
regw(sc, BUS_CNTL, regr(sc, BUS_CNTL) | BUS_HOST_ERR_ACK |
regw(sc, CONTEXT_MASK, 0xffffffff);
regw(sc, DST_OFF_PITCH, (pitch_value >> 3) << 22);
regw(sc, CRTC_OFF_PITCH, (sc->stride >> 3) << 22);
regw(sc, DST_Y_X, 0);
regw(sc, DST_HEIGHT, 0);
regw(sc, DST_BRES_ERR, 0);
regw(sc, DST_BRES_INC, 0);
regw(sc, DST_BRES_DEC, 0);
regw(sc, DST_CNTL, DST_LAST_PEL | DST_X_LEFT_TO_RIGHT |
regw(sc, SRC_OFF_PITCH, (pitch_value >> 3) << 22);
regw(sc, SRC_Y_X, 0);
regw(sc, SRC_HEIGHT1_WIDTH1, 1);
regw(sc, SRC_Y_X_START, 0);
regw(sc, SRC_HEIGHT2_WIDTH2, 1);
regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT);
regw(sc, HOST_CNTL, 0);
regw(sc, PAT_REG0, 0);
regw(sc, PAT_REG1, 0);
regw(sc, PAT_CNTL, 0);
regw(sc, SC_LEFT, 0);
regw(sc, SC_TOP, 0);
regw(sc, SC_BOTTOM, 0x3fff);
regw(sc, SC_RIGHT, pitch_value - 1);
regw(sc, DP_BKGD_CLR, WS_DEFAULT_BG);
regw(sc, DP_FRGD_CLR, WS_DEFAULT_FG);
regw(sc, DP_WRITE_MASK, 0xffffffff);
regw(sc, DP_MIX, (MIX_SRC << 16) | MIX_DST);
regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR);
regw(sc, CLR_CMP_CLR, 0);
regw(sc, CLR_CMP_MASK, 0xffffffff);
regw(sc, CLR_CMP_CNTL, 0);
regw(sc, DP_PIX_WIDTH, HOST_1BPP | SRC_8BPP | DST_8BPP);
regw(sc, DP_CHAIN_MASK, DP_CHAIN_8BPP);
regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN);
regw(sc, DP_PIX_WIDTH, HOST_1BPP | SRC_32BPP | DST_32BPP);
regw(sc, DP_CHAIN_MASK, DP_CHAIN_32BPP);
regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN);
regw(sc, DP_WRITE_MASK, 0xff);
regw(sc, CRTC_INT_CNTL, regr(sc, CRTC_INT_CNTL) & ~0x20);
regw(sc, GUI_TRAJ_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
regw(sc, CRTC_OFF_PITCH, (regr(sc, CRTC_OFF_PITCH) & 0xfff00000) |
regw(sc, DSP_ON_OFF, ((dsp_on << 16) & DSP_ON) | (dsp_off & DSP_OFF));
regw(sc, DSP_CONFIG, ((dsp_precision << 20) & DSP_PRECISION) |
regw(sc, CLOCK_CNTL, clockreg);
regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP);
regw(sc, DP_SRC, MONO_SRC_ONE | BKGD_SRC_HOST | FRGD_SRC_HOST);
regw(sc, DP_MIX, ((MIX_SRC & 0xffff) << 16) | MIX_SRC);
regw(sc, CLR_CMP_CNTL ,0); /* no transparency */
regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT);
regw(sc, DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT);
regw(sc, HOST_CNTL, HOST_BYTE_ALIGN);
regw(sc, SRC_Y_X, 0);
regw(sc, SRC_WIDTH1, wi);
regw(sc, DST_Y_X, (x << 16) | y);
regw(sc, DST_HEIGHT_WIDTH, (wi << 16) | he);
regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP);
regw(sc, DP_SRC, FRGD_SRC_BLIT);
regw(sc, DP_MIX, (rop & 0xffff) << 16);
regw(sc, CLR_CMP_CNTL, 0); /* no transparency */
regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT);
regw(sc, SRC_CNTL, SRC_LINE_X_RIGHT_TO_LEFT);
regw(sc, DST_CNTL, dest_ctl);
regw(sc, SRC_Y_X, (xs << 16) | ys);
regw(sc, SRC_WIDTH1, width);
regw(sc, DST_Y_X, (xd << 16) | yd);
regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height);
regw(sc, DP_WRITE_MASK, 0xff); /* XXX only good for 8 bit */
regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_1BPP | HOST_1BPP);
regw(sc, DP_SRC, MONO_SRC_HOST | BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR);
regw(sc, DP_MIX, ((MIX_SRC & 0xffff) << 16) | MIX_SRC);
regw(sc, CLR_CMP_CNTL ,0); /* no transparency */
regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT);
regw(sc, DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT);
regw(sc, HOST_CNTL, HOST_BYTE_ALIGN);
regw(sc, DP_BKGD_CLR, bg);
regw(sc, DP_FRGD_CLR, fg);
regw(sc, SRC_Y_X, 0);
regw(sc, SRC_WIDTH1, width);
regw(sc, DST_Y_X, (xd << 16) | yd);
regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height);
regw(sc, HOST_DATA0 + reg, latch);
regw(sc, HOST_DATA0 + reg, latch);
regw(sc, DP_FRGD_CLR, colour);
regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP);
regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR);
regw(sc, DP_MIX, MIX_SRC << 16);
regw(sc, CLR_CMP_CNTL, 0); /* no transparency */
regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT);
regw(sc, DST_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
regw(sc, SRC_Y_X, (x << 16) | y);
regw(sc, SRC_WIDTH1, width);
regw(sc, DST_Y_X, (x << 16) | y);
regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height);
regw(sc, CRTC_GEN_CNTL, reg & ~(MACH64_BLANK));
regw(sc, CRTC_GEN_CNTL, reg | (MACH64_BLANK));
regw(sc, CLOCK_CNTL, reg);
regw(sc, CLOCK_CNTL, reg);
regw(sc, CLOCK_CNTL, reg);
regw(sc, BUS_CNTL, reg);