sys/arch/arm/sunxi/sunxi_nand.c

561

nand->read_2 = sunxi_nand_read_2;

sys/arch/arm/ti/omap2_nand.c

270

sc->sc_nand_if.read_2 = &omap2_nand_read_2;

sys/arch/hpcmips/vr/vrc4172gpio.c

117

static u_int16_t read_2(struct vrc4172gpio_softc *, bus_addr_t);

sys/arch/hpcmips/vr/vrc4172gpio.c

163

reg0 = read_2(sc, off);

sys/arch/hpcmips/vr/vrc4172gpio.c

164

reg1 = read_2(sc, off + VRC2_EXGP_OFFSET);

sys/arch/hpcmips/vr/vrc4172gpio.c

222

t0 = read_2(sc, VRC2_EXGPINTLV0L);

sys/arch/hpcmips/vr/vrc4172gpio.c

223

t1 = read_2(sc, VRC2_EXGPINTLV0H);

sys/arch/hpcmips/vr/vrc4172gpio.c

224

t2 = read_2(sc, VRC2_EXGPINTLV1L);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1181

t->bs_r_2 = __BS(read_2);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1274

t->bs_rs_2 = __BS(read_2);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

721

__BS(read_2)(void *v, bus_space_handle_t h, bus_size_t off)

sys/arch/mips/rmi/rmixl_nand.c

212

sc->sc_nand_if.read_2 = rmixl_nand_read_2;

sys/dev/ic/am79c930var.h

57

u_int16_t (*read_2)(struct am79c930_softc *, u_int32_t);

sys/dev/ic/awivar.h

122

#define awi_read_2(sc, off) ((sc)->sc_chip.sc_ops->read_2)(&sc->sc_chip, off)

sys/dev/nand/nand.c

303

interface->read_2 = NULL;

sys/dev/nand/nand.h

174

void (*read_2) (device_t, uint16_t *);

sys/dev/nand/nand.h

281

KASSERT(sc->nand_if->read_2 != NULL);

sys/dev/nand/nand.h

284

sc->nand_if->read_2(sc->controller_dev, data);

sys/dev/nand/nandemulator.c

190

sc->sc_nand_if.read_2 = &nandemulator_read_2;

sys/dev/nor/cfi.c

143

.read_2 = cfi_read_2,

sys/dev/nor/nor.c

316

nor_if->read_2 = NULL;

sys/dev/nor/nor.h

108

void (*read_2) (device_t, flash_off_t, uint16_t *);

sys/dev/nor/nor.h

189

KASSERT(sc->sc_nor_if->read_2 != NULL);

sys/dev/nor/nor.h

192

sc->sc_nor_if->read_2(sc->sc_controller_dev, offset, data);