Symbol: CSR_WRITE_1
sys/arch/arm/xscale/pxa2x0_mci.c
986
CSR_WRITE_1(sc, MMC_TXFIFO, *cmd->c_buf++);
sys/arch/evbarm/stand/boot2440/dm9000.c
200
CSR_WRITE_1(l, NCR, 0); /* use internal PHY */
sys/arch/evbarm/stand/boot2440/dm9000.c
204
CSR_WRITE_1(l, GPR, GPR_PHYPWROFF);
sys/arch/evbarm/stand/boot2440/dm9000.c
206
CSR_WRITE_1(l, IMR, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
207
CSR_WRITE_1(l, TCR, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
208
CSR_WRITE_1(l, RCR, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
211
CSR_WRITE_1(l, NCR, NCR_RST);
sys/arch/evbarm/stand/boot2440/dm9000.c
217
CSR_WRITE_1(l, GPR, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
220
CSR_WRITE_1(l, NCR, NCR_RST);
sys/arch/evbarm/stand/boot2440/dm9000.c
230
CSR_WRITE_1(l, PAR + 0, en[0]);
sys/arch/evbarm/stand/boot2440/dm9000.c
231
CSR_WRITE_1(l, PAR + 1, en[1]);
sys/arch/evbarm/stand/boot2440/dm9000.c
232
CSR_WRITE_1(l, PAR + 2, en[2]);
sys/arch/evbarm/stand/boot2440/dm9000.c
233
CSR_WRITE_1(l, PAR + 3, en[3]);
sys/arch/evbarm/stand/boot2440/dm9000.c
234
CSR_WRITE_1(l, PAR + 4, en[4]);
sys/arch/evbarm/stand/boot2440/dm9000.c
235
CSR_WRITE_1(l, PAR + 5, en[5]);
sys/arch/evbarm/stand/boot2440/dm9000.c
238
CSR_WRITE_1(l, MAR + 0, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
239
CSR_WRITE_1(l, MAR + 1, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
240
CSR_WRITE_1(l, MAR + 2, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
241
CSR_WRITE_1(l, MAR + 3, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
242
CSR_WRITE_1(l, MAR + 4, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
243
CSR_WRITE_1(l, MAR + 5, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
244
CSR_WRITE_1(l, MAR + 6, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
245
CSR_WRITE_1(l, MAR + 7, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
274
CSR_WRITE_1(l, FCR, val | FCR_FLCE);
sys/arch/evbarm/stand/boot2440/dm9000.c
278
CSR_WRITE_1(l, NSR, ~0);
sys/arch/evbarm/stand/boot2440/dm9000.c
279
CSR_WRITE_1(l, ISR, ~0);
sys/arch/evbarm/stand/boot2440/dm9000.c
286
CSR_WRITE_1(l, TCR2, TCR2_ONEPM);
sys/arch/evbarm/stand/boot2440/dm9000.c
287
CSR_WRITE_1(l, RCR, RCR_RXEN | RCR_WTDIS | RCR_DIS_LONG | RCR_DIS_CRC);
sys/arch/evbarm/stand/boot2440/dm9000.c
288
CSR_WRITE_1(l, IMR, IMR_PAR);
sys/arch/evbarm/stand/boot2440/dm9000.c
305
CSR_WRITE_1(l, ISR, ISR_PTM); /* clear ISR Tx complete bit */
sys/arch/evbarm/stand/boot2440/dm9000.c
311
CSR_WRITE_1(l, TXPLL, len);
sys/arch/evbarm/stand/boot2440/dm9000.c
312
CSR_WRITE_1(l, TXPLH, len >> 8);
sys/arch/evbarm/stand/boot2440/dm9000.c
313
CSR_WRITE_1(l, TCR, TCR_TXREQ); /* request to transmit */
sys/arch/evbarm/stand/boot2440/dm9000.c
347
CSR_WRITE_1(l, ISR, ISR_PRS); /* clear ISR Rx complete bit */
sys/arch/evbarm/stand/boot2440/dm9000.c
390
CSR_WRITE_1(l, EPAR, phy << 6 | reg);
sys/arch/evbarm/stand/boot2440/dm9000.c
391
CSR_WRITE_1(l, EPCR, EP_EPOS | EP_ERPRR);
sys/arch/evbarm/stand/boot2440/dm9000.c
395
CSR_WRITE_1(l, EPCR, 0);
sys/arch/evbarm/stand/boot2440/dm9000.c
405
CSR_WRITE_1(l, EPAR, phy << 6 | reg);
sys/arch/evbarm/stand/boot2440/dm9000.c
406
CSR_WRITE_1(l, EPDRL, data);
sys/arch/evbarm/stand/boot2440/dm9000.c
407
CSR_WRITE_1(l, EPDRH, data >> 8);
sys/arch/evbarm/stand/boot2440/dm9000.c
408
CSR_WRITE_1(l, EPCR, EP_EPOS | EP_ERPRW);
sys/arch/evbarm/stand/boot2440/dm9000.c
412
CSR_WRITE_1(l, EPCR, 0);
sys/arch/sandpoint/stand/altboot/dsk.c
184
CSR_WRITE_1(chan->ctl, ATA_DREQ);
sys/arch/sandpoint/stand/altboot/dsk.c
186
CSR_WRITE_1(chan->ctl, ATA_SRST|ATA_DREQ);
sys/arch/sandpoint/stand/altboot/dsk.c
188
CSR_WRITE_1(chan->ctl, ATA_DREQ);
sys/arch/sandpoint/stand/altboot/dsk.c
199
CSR_WRITE_1(chan->cmd + _NSECT, 0);
sys/arch/sandpoint/stand/altboot/dsk.c
200
CSR_WRITE_1(chan->cmd + _CMD, ATA_CMD_IDLE);
sys/arch/sandpoint/stand/altboot/dsk.c
203
CSR_WRITE_1(chan->cmd + _NSECT, 0);
sys/arch/sandpoint/stand/altboot/dsk.c
204
CSR_WRITE_1(chan->cmd + _CMD, ATA_CMD_STANDBY);
sys/arch/sandpoint/stand/altboot/dsk.c
214
CSR_WRITE_1(chan->cmd + _CMD, ATA_CMD_CHKPWR);
sys/arch/sandpoint/stand/altboot/dsk.c
227
CSR_WRITE_1(chan->cmd + _CMD, ATA_CMD_IDENT);
sys/arch/sandpoint/stand/altboot/dsk.c
388
CSR_WRITE_1(chan->cmd + _FEA, ATA_XFER);
sys/arch/sandpoint/stand/altboot/dsk.c
389
CSR_WRITE_1(chan->cmd + _NSECT, XFER_PIO0);
sys/arch/sandpoint/stand/altboot/dsk.c
390
CSR_WRITE_1(chan->cmd + _DEV, ATA_DEV_OBS); /* ??? */
sys/arch/sandpoint/stand/altboot/dsk.c
391
CSR_WRITE_1(chan->cmd + _CMD, ATA_CMD_SETF);
sys/arch/sandpoint/stand/altboot/dsk.c
438
CSR_WRITE_1(chan->cmd + _NSECT, 0); /* always less than 256 */
sys/arch/sandpoint/stand/altboot/dsk.c
439
CSR_WRITE_1(chan->cmd + _LBAL, (bno >> 24) & 0xff);
sys/arch/sandpoint/stand/altboot/dsk.c
440
CSR_WRITE_1(chan->cmd + _LBAM, (bno >> 32) & 0xff);
sys/arch/sandpoint/stand/altboot/dsk.c
441
CSR_WRITE_1(chan->cmd + _LBAH, (bno >> 40) & 0xff);
sys/arch/sandpoint/stand/altboot/dsk.c
442
CSR_WRITE_1(chan->cmd + _NSECT, nblk);
sys/arch/sandpoint/stand/altboot/dsk.c
443
CSR_WRITE_1(chan->cmd + _LBAL, (bno >> 0) & 0xff);
sys/arch/sandpoint/stand/altboot/dsk.c
444
CSR_WRITE_1(chan->cmd + _LBAM, (bno >> 8) & 0xff);
sys/arch/sandpoint/stand/altboot/dsk.c
445
CSR_WRITE_1(chan->cmd + _LBAH, (bno >> 16) & 0xff);
sys/arch/sandpoint/stand/altboot/dsk.c
446
CSR_WRITE_1(chan->cmd + _DEV, ATA_DEV_LBA);
sys/arch/sandpoint/stand/altboot/dsk.c
447
CSR_WRITE_1(chan->cmd + _CMD, ATA_CMD_READ_EXT);
sys/arch/sandpoint/stand/altboot/dsk.c
454
CSR_WRITE_1(chan->cmd + _NSECT, nblk);
sys/arch/sandpoint/stand/altboot/dsk.c
455
CSR_WRITE_1(chan->cmd + _LBAL, (bno >> 0) & 0xff);
sys/arch/sandpoint/stand/altboot/dsk.c
456
CSR_WRITE_1(chan->cmd + _LBAM, (bno >> 8) & 0xff);
sys/arch/sandpoint/stand/altboot/dsk.c
457
CSR_WRITE_1(chan->cmd + _LBAH, (bno >> 16) & 0xff);
sys/arch/sandpoint/stand/altboot/dsk.c
458
CSR_WRITE_1(chan->cmd + _DEV, ((bno >> 24) & 0xf) | ATA_DEV_LBA);
sys/arch/sandpoint/stand/altboot/dsk.c
459
CSR_WRITE_1(chan->cmd + _CMD, ATA_CMD_READ);
sys/arch/sandpoint/stand/altboot/fxp.c
221
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE);
sys/arch/sandpoint/stand/altboot/fxp.c
224
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE);
sys/arch/sandpoint/stand/altboot/fxp.c
277
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
sys/arch/sandpoint/stand/altboot/fxp.c
300
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
sys/arch/sandpoint/stand/altboot/fxp.c
321
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START);
sys/arch/sandpoint/stand/altboot/fxp.c
352
CSR_WRITE_1(l, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
sys/arch/sandpoint/stand/altboot/fxp.c
373
CSR_WRITE_1(l, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_RESUME);
sys/arch/sandpoint/stand/altboot/fxp.c
401
CSR_WRITE_1(l, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_RESUME);
sys/arch/sandpoint/stand/altboot/nvt.c
183
CSR_WRITE_1(l, VR_CTL1, val);
sys/arch/sandpoint/stand/altboot/nvt.c
230
CSR_WRITE_1(l, VR_RCR, 0);
sys/arch/sandpoint/stand/altboot/nvt.c
231
CSR_WRITE_1(l, VR_TCR, 0);
sys/arch/sandpoint/stand/altboot/nvt.c
235
CSR_WRITE_1(l, VR_CTL1, CTL1_FDX);
sys/arch/sandpoint/stand/altboot/nvt.c
236
CSR_WRITE_1(l, VR_CTL0, CTL0_START);
sys/arch/sandpoint/stand/altboot/nvt.c
237
CSR_WRITE_1(l, VR_CTL0, l->ctl0);
sys/arch/sandpoint/stand/altboot/nvt.c
259
CSR_WRITE_1(l, VR_CTL0, l->ctl0 | CTL0_TDMD);
sys/arch/sandpoint/stand/altboot/nvt.c
319
CSR_WRITE_1(l, VR_MIICR, 0);
sys/arch/sandpoint/stand/altboot/nvt.c
324
CSR_WRITE_1(l, VR_MIICR, MIICR_MAUTO);
sys/arch/sandpoint/stand/altboot/nvt.c
336
CSR_WRITE_1(l, VR_MIICR, 0);
sys/arch/sandpoint/stand/altboot/nvt.c
349
CSR_WRITE_1(l, VR_MIICFG, phy);
sys/arch/sandpoint/stand/altboot/nvt.c
350
CSR_WRITE_1(l, VR_MIIADR, reg);
sys/arch/sandpoint/stand/altboot/nvt.c
351
CSR_WRITE_1(l, VR_MIICR, MIICR_RCMD);
sys/arch/sandpoint/stand/altboot/nvt.c
367
CSR_WRITE_1(l, VR_MIICFG, phy);
sys/arch/sandpoint/stand/altboot/nvt.c
368
CSR_WRITE_1(l, VR_MIIADR, reg);
sys/arch/sandpoint/stand/altboot/nvt.c
369
CSR_WRITE_1(l, VR_MIICR, MIICR_WCMD);
sys/arch/sandpoint/stand/altboot/rge.c
159
CSR_WRITE_1(l, RGE_CR, CR_RESET);
sys/arch/sandpoint/stand/altboot/rge.c
171
CSR_WRITE_1(l, RGE_EECMD, EECMD_UNLOCK);
sys/arch/sandpoint/stand/altboot/rge.c
176
CSR_WRITE_1(l, RGE_EECMD, EECMD_LOCK);
sys/arch/sandpoint/stand/altboot/rge.c
218
CSR_WRITE_1(l, RGE_CR, CR_TXEN | CR_RXEN);
sys/arch/sandpoint/stand/altboot/rge.c
219
CSR_WRITE_1(l, RGE_ETTHR, 0x3f);
sys/arch/sandpoint/stand/altboot/rge.c
254
CSR_WRITE_1(l, RGE_TPPOLL, 0x40);
sys/arch/sandpoint/stand/altboot/skg.c
251
CSR_WRITE_1(l, SK_RXMF1_CTRL_TEST, RFCTL_RESET_CLEAR);
sys/arch/sandpoint/stand/altboot/skg.c
253
CSR_WRITE_1(l, SK_TXMF1_CTRL_TEST, TFCTL_RESET_CLEAR);
sys/arch/sandpoint/stand/altboot/skg.c
289
CSR_WRITE_1(l, SK_TXAR1_COUNTERCTL, TXARCTL_ON|TXARCTL_FSYNC_ON);
sys/arch/sandpoint/stand/altboot/stg.c
207
CSR_WRITE_1(l, STGE_StationAddress0 + i, en[i]);
sys/arch/sandpoint/stand/altboot/stg.c
397
CSR_WRITE_1(l, STGE_PhyCtrl, v);
sys/arch/sandpoint/stand/altboot/stg.c
509
CSR_WRITE_1(l, STGE_PhyCtrl, v);
sys/arch/sandpoint/stand/altboot/stg.c
522
CSR_WRITE_1(l, STGE_PhyCtrl, v);
sys/arch/sandpoint/stand/altboot/stg.c
529
CSR_WRITE_1(l, STGE_PhyCtrl, v);
sys/arch/sandpoint/stand/altboot/stg.c
539
CSR_WRITE_1(l, STGE_PhyCtrl, v | PC_MgmtClk);
sys/arch/sandpoint/stand/altboot/stg.c
541
CSR_WRITE_1(l, STGE_PhyCtrl, v);
sys/arch/sandpoint/stand/altboot/vge.c
230
CSR_WRITE_1(l, VR_CTL1, val);
sys/arch/sandpoint/stand/altboot/vge.c
276
CSR_WRITE_1(l, VR_CAMCTL, CAMCTL_ADDR);
sys/arch/sandpoint/stand/altboot/vge.c
277
CSR_WRITE_1(l, VR_CAMADR, CAM_EN | SADR_CAM | 0);
sys/arch/sandpoint/stand/altboot/vge.c
279
CSR_WRITE_1(l, VR_CAM0 + i, en[i]);
sys/arch/sandpoint/stand/altboot/vge.c
280
CSR_WRITE_1(l, VR_CAMCTL, CAMCTL_ADDR | CAMCTL_WR);
sys/arch/sandpoint/stand/altboot/vge.c
285
CSR_WRITE_1(l, VR_CAMCTL, CAMCTL_VBIT);
sys/arch/sandpoint/stand/altboot/vge.c
286
CSR_WRITE_1(l, VR_CAM0, 01);
sys/arch/sandpoint/stand/altboot/vge.c
288
CSR_WRITE_1(l, VR_CAM0 + i, 00);
sys/arch/sandpoint/stand/altboot/vge.c
289
CSR_WRITE_1(l, VR_CAMADR, 0);
sys/arch/sandpoint/stand/altboot/vge.c
290
CSR_WRITE_1(l, VR_CAMCTL, 0);
sys/arch/sandpoint/stand/altboot/vge.c
300
CSR_WRITE_1(l, VR_RDCSR, 01);
sys/arch/sandpoint/stand/altboot/vge.c
301
CSR_WRITE_1(l, VR_RDCSR, 04);
sys/arch/sandpoint/stand/altboot/vge.c
303
CSR_WRITE_1(l, VR_RCR, RCR_AP);
sys/arch/sandpoint/stand/altboot/vge.c
304
CSR_WRITE_1(l, VR_TCR, 0);
sys/arch/sandpoint/stand/altboot/vge.c
305
CSR_WRITE_1(l, VR_CTL0 + 0x4, CTL0_STOP);
sys/arch/sandpoint/stand/altboot/vge.c
306
CSR_WRITE_1(l, VR_CTL0, CTL0_TXON | CTL0_RXON | CTL0_START);
sys/arch/sandpoint/stand/altboot/vge.c
400
CSR_WRITE_1(l, VR_MIICR, 0);
sys/arch/sandpoint/stand/altboot/vge.c
401
CSR_WRITE_1(l, VR_MIIADR, 1U << 7);
sys/arch/sandpoint/stand/altboot/vge.c
406
CSR_WRITE_1(l, VR_MIICR, MIICR_MAUTO);
sys/arch/sandpoint/stand/altboot/vge.c
418
CSR_WRITE_1(l, VR_MIICR, 0);
sys/arch/sandpoint/stand/altboot/vge.c
431
CSR_WRITE_1(l, VR_MIICFG, phy);
sys/arch/sandpoint/stand/altboot/vge.c
432
CSR_WRITE_1(l, VR_MIIADR, reg);
sys/arch/sandpoint/stand/altboot/vge.c
433
CSR_WRITE_1(l, VR_MIICR, MIICR_RCMD);
sys/arch/sandpoint/stand/altboot/vge.c
449
CSR_WRITE_1(l, VR_MIICFG, phy);
sys/arch/sandpoint/stand/altboot/vge.c
450
CSR_WRITE_1(l, VR_MIIADR, reg);
sys/arch/sandpoint/stand/altboot/vge.c
451
CSR_WRITE_1(l, VR_MIICR, MIICR_WCMD);
sys/dev/ic/com.c
1100
CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
sys/dev/ic/com.c
1203
CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
sys/dev/ic/com.c
1906
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
1922
CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART);
sys/dev/ic/com.c
1924
CSR_WRITE_1(regsp, COM_REG_IER, 0);
sys/dev/ic/com.c
1928
CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_DISABLE);
sys/dev/ic/com.c
1935
CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
sys/dev/ic/com.c
1936
CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr);
sys/dev/ic/com.c
1940
CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
sys/dev/ic/com.c
1941
CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr | EFR_EFCR);
sys/dev/ic/com.c
1948
CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
sys/dev/ic/com.c
1949
CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
sys/dev/ic/com.c
1950
CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
sys/dev/ic/com.c
1952
CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
sys/dev/ic/com.c
1953
CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active = sc->sc_mcr);
sys/dev/ic/com.c
1954
CSR_WRITE_1(regsp, COM_REG_FIFO, sc->sc_fifo);
sys/dev/ic/com.c
1957
CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
sys/dev/ic/com.c
1958
CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr);
sys/dev/ic/com.c
1959
CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
sys/dev/ic/com.c
1979
CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr | MCR_TCR_TLR);
sys/dev/ic/com.c
1982
CSR_WRITE_1(regsp, COM_REG_TLR, tlr_value);
sys/dev/ic/com.c
1983
CSR_WRITE_1(regsp, COM_REG_TCR, tcr_value);
sys/dev/ic/com.c
1986
CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr);
sys/dev/ic/com.c
1990
CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_13X);
sys/dev/ic/com.c
1992
CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_16X);
sys/dev/ic/com.c
1996
CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
sys/dev/ic/com.c
2063
CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active);
sys/dev/ic/com.c
2104
CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
sys/dev/ic/com.c
2273
CSR_WRITE_1(&sc->sc_regs, COM_REG_IER,
sys/dev/ic/com.c
2421
CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
sys/dev/ic/com.c
2431
CSR_WRITE_1(regsp, COM_REG_HALT, HALT_CHCFG_EN);
sys/dev/ic/com.c
2432
CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
sys/dev/ic/com.c
2433
CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
sys/dev/ic/com.c
2434
CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
sys/dev/ic/com.c
2435
CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
sys/dev/ic/com.c
2436
CSR_WRITE_1(regsp, COM_REG_HALT,
sys/dev/ic/com.c
2454
CSR_WRITE_1(regsp, COM_REG_HALT, 0);
sys/dev/ic/com.c
2457
CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB);
sys/dev/ic/com.c
2458
CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl);
sys/dev/ic/com.c
2459
CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh);
sys/dev/ic/com.c
2460
CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr);
sys/dev/ic/com.c
2567
CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
sys/dev/ic/com.c
2667
CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
sys/dev/ic/com.c
2769
CSR_WRITE_1(regsp, COM_REG_TXDATA, c);
sys/dev/ic/com.c
2789
CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_DISABLE);
sys/dev/ic/com.c
2800
CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
sys/dev/ic/com.c
2801
CSR_WRITE_1(regsp, COM_REG_EFR, 0);
sys/dev/ic/com.c
2803
CSR_WRITE_1(regsp, COM_REG_LCR, LCR_DLAB);
sys/dev/ic/com.c
2804
CSR_WRITE_1(regsp, COM_REG_DLBL, rate & 0xff);
sys/dev/ic/com.c
2805
CSR_WRITE_1(regsp, COM_REG_DLBH, rate >> 8);
sys/dev/ic/com.c
2808
CSR_WRITE_1(regsp, COM_REG_LCR, cflag2lcr(cflag));
sys/dev/ic/com.c
2809
CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS);
sys/dev/ic/com.c
2812
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
2816
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
2833
CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS | MCR_TCR_TLR);
sys/dev/ic/com.c
2836
CSR_WRITE_1(regsp, COM_REG_TLR, tlr_value);
sys/dev/ic/com.c
2837
CSR_WRITE_1(regsp, COM_REG_TCR, tcr_value);
sys/dev/ic/com.c
2840
CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS);
sys/dev/ic/com.c
2844
CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_13X);
sys/dev/ic/com.c
2846
CSR_WRITE_1(regsp, COM_REG_MDR1, MDR1_MODE_UART_16X);
sys/dev/ic/com.c
2851
CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART);
sys/dev/ic/com.c
2853
CSR_WRITE_1(regsp, COM_REG_IER, 0);
sys/dev/ic/com.c
3034
CSR_WRITE_1(&sc->sc_regs, COM_REG_FIFO, 0);
sys/dev/ic/com.c
3044
CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, 0);
sys/dev/ic/com.c
518
CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS);
sys/dev/ic/com.c
519
CSR_WRITE_1(regs, COM_REG_IIR, 0);
sys/dev/ic/com.c
552
CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier);
sys/dev/ic/com.c
554
CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr);
sys/dev/ic/com.c
615
CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
sys/dev/ic/com.c
683
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
691
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
704
CSR_WRITE_1(regsp, COM_REG_FIFO, 0);
sys/dev/ic/com.c
708
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
719
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
727
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
731
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
756
CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS);
sys/dev/ic/com.c
757
CSR_WRITE_1(regsp, COM_REG_EFR, 0);
sys/dev/ic/com.c
759
CSR_WRITE_1(regsp, COM_REG_LCR,
sys/dev/ic/com.c
771
CSR_WRITE_1(regsp, COM_REG_LCR, lcr);
sys/dev/ic/com.c
794
CSR_WRITE_1(regsp, COM_REG_LCR,
sys/dev/ic/com.c
796
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
799
CSR_WRITE_1(regsp, COM_REG_FIFO, fcr);
sys/dev/ic/com.c
800
CSR_WRITE_1(regsp, COM_REG_LCR, lcr | LCR_DLAB);
sys/dev/ic/com.c
801
CSR_WRITE_1(regsp, COM_REG_FIFO,
sys/dev/ic/com.c
805
CSR_WRITE_1(regsp, COM_REG_LCR, lcr);
sys/dev/ic/com.c
813
CSR_WRITE_1(regsp, COM_REG_FIFO, fcr);
sys/dev/ic/com.c
824
CSR_WRITE_1(regsp, COM_REG_FIFO, 0);
sys/dev/ic/com.c
951
CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier);
sys/dev/ic/i82557.c
1089
CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
sys/dev/ic/i82557.c
1101
CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
sys/dev/ic/i82557.c
2008
CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTRCNTL_REQUEST_SWI);
sys/dev/ic/i82557.c
247
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, cmd);
sys/dev/ic/rtl8169.c
1624
CSR_WRITE_1(sc, RTK_TXSTART, RTK_TXSTART_START);
sys/dev/ic/rtl8169.c
1626
CSR_WRITE_1(sc, RTK_GTXSTART, RTK_TXSTART_START);
sys/dev/ic/rtl8169.c
1905
CSR_WRITE_1(sc, RTK_TXSTART, RTK_TXSTART_START);
sys/dev/ic/rtl8169.c
1907
CSR_WRITE_1(sc, RTK_GTXSTART, RTK_TXSTART_START);
sys/dev/ic/rtl8169.c
2009
CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_WRITECFG);
sys/dev/ic/rtl8169.c
2016
CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_OFF);
sys/dev/ic/rtl8169.c
2047
CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
sys/dev/ic/rtl8169.c
2059
CSR_WRITE_1(sc, RTK_EARLY_TX_THRESH, 16);
sys/dev/ic/rtl8169.c
2096
CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
sys/dev/ic/rtl8169.c
2112
CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
sys/dev/ic/rtl8169.c
2177
CSR_WRITE_1(sc, RTK_CFG1, RTK_CFG1_DRVLOAD);
sys/dev/ic/rtl8169.c
2330
CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_STOPREQ | RTK_CMD_TX_ENB |
sys/dev/ic/rtl8169.c
2333
CSR_WRITE_1(sc, RTK_COMMAND, 0x00);
sys/dev/ic/rtl8169.c
423
CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_RESET);
sys/dev/ic/rtl8169.c
439
CSR_WRITE_1(sc, RTK_LDPS, 1);
sys/dev/ic/rtl8169.c
800
CSR_WRITE_1(sc, RTK_PMCH, CSR_READ_1(sc, RTK_PMCH) | 0x80);
sys/dev/ic/rtl81x9.c
1353
CSR_WRITE_1(sc, RTK_IDR0 + i, CLLADDR(ifp->if_sadl)[i]);
sys/dev/ic/rtl81x9.c
1369
CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
sys/dev/ic/rtl81x9.c
1415
CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
sys/dev/ic/rtl81x9.c
1417
CSR_WRITE_1(sc, RTK_CFG1, RTK_CFG1_DRVLOAD | RTK_CFG1_FULLDUPLEX);
sys/dev/ic/rtl81x9.c
146
CSR_WRITE_1(sc, RTK_EECMD, \
sys/dev/ic/rtl81x9.c
1490
CSR_WRITE_1(sc, RTK_COMMAND, 0x00);
sys/dev/ic/rtl81x9.c
150
CSR_WRITE_1(sc, RTK_EECMD, \
sys/dev/ic/rtl81x9.c
194
CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_PROGRAM);
sys/dev/ic/rtl81x9.c
217
CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_OFF);
sys/dev/ic/rtl81x9.c
229
CSR_WRITE_1(sc, RTK_MII, \
sys/dev/ic/rtl81x9.c
233
CSR_WRITE_1(sc, RTK_MII, \
sys/dev/ic/rtl81x9.c
600
CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_RESET);
sys/dev/pci/if_ale.c
1398
CSR_WRITE_1(sc, ALE_RXF0_PAGE0 + sc->ale_cdata.ale_rx_curp,
sys/dev/pci/if_ale.c
1663
CSR_WRITE_1(sc, ALE_RXF0_PAGE0, RXF_VALID);
sys/dev/pci/if_ale.c
1664
CSR_WRITE_1(sc, ALE_RXF0_PAGE1, RXF_VALID);
sys/dev/pci/if_ipw.c
2297
CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);
sys/dev/pci/if_ipwreg.h
340
CSR_WRITE_1((sc), IPW_CSR_INDIRECT_DATA, (val)); \
sys/dev/pci/if_iwireg.h
564
CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \
sys/dev/pci/if_msk.c
1024
CSR_WRITE_1(sc, SK_TIMERCTL, SK_IMCTL_STOP);
sys/dev/pci/if_msk.c
1025
CSR_WRITE_1(sc, SK_TIMERCTL, SK_IMCTL_IRQ_CLEAR);
sys/dev/pci/if_msk.c
1031
CSR_WRITE_1(sc, SK_TSTAMP_CTL, SK_TSTAMP_STOP);
sys/dev/pci/if_msk.c
1032
CSR_WRITE_1(sc, SK_TSTAMP_CTL, SK_TSTAMP_IRQ_CLEAR);
sys/dev/pci/if_msk.c
277
CSR_WRITE_1(sc, reg, x);
sys/dev/pci/if_msk.c
945
CSR_WRITE_1(sc, SK_Y2_ASF_CSR, SK_Y2_ASF_RESET);
sys/dev/pci/if_msk.c
948
CSR_WRITE_1(sc, SK_CSR, SK_CSR_SW_RESET);
sys/dev/pci/if_msk.c
949
CSR_WRITE_1(sc, SK_CSR, SK_CSR_MASTER_RESET);
sys/dev/pci/if_msk.c
952
CSR_WRITE_1(sc, SK_CSR, SK_CSR_SW_UNRESET);
sys/dev/pci/if_msk.c
954
CSR_WRITE_1(sc, SK_CSR, SK_CSR_MASTER_UNRESET);
sys/dev/pci/if_sk.c
318
CSR_WRITE_1(sc, SK_WIN_BASE + SK_REG(reg), x);
sys/dev/pci/if_sk.c
320
CSR_WRITE_1(sc, reg, x);
sys/dev/pci/if_stge.c
1556
CSR_WRITE_1(sc, STGE_StationAddress0 + i,
sys/dev/pci/if_stge.c
1591
CSR_WRITE_1(sc, STGE_TxDMAPollPeriod, 127);
sys/dev/pci/if_stge.c
1594
CSR_WRITE_1(sc, STGE_RxDMAPollPeriod, 64);
sys/dev/pci/if_stge.c
1600
CSR_WRITE_1(sc, STGE_RxDMABurstThresh, 0x30);
sys/dev/pci/if_stge.c
1601
CSR_WRITE_1(sc, STGE_RxDMAUrgentThresh, 0x30);
sys/dev/pci/if_stge.c
1607
CSR_WRITE_1(sc, STGE_TxDMABurstThresh, 0x30);
sys/dev/pci/if_stge.c
1608
CSR_WRITE_1(sc, STGE_TxDMAUrgentThresh, 0x04);
sys/dev/pci/if_stge.c
2028
CSR_WRITE_1(sc, STGE_PhyCtrl, val | sc->sc_PhyCtrl);
sys/dev/pci/if_vge.c
1407
CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_TIMER0_ENABLE);
sys/dev/pci/if_vge.c
1465
CSR_WRITE_1(sc, VGE_CRC3, VGE_CR3_INT_GMSK);
sys/dev/pci/if_vge.c
1487
CSR_WRITE_1(sc, VGE_RXQCSRS, VGE_RXQCSR_RUN);
sys/dev/pci/if_vge.c
1488
CSR_WRITE_1(sc, VGE_RXQCSRS, VGE_RXQCSR_WAK);
sys/dev/pci/if_vge.c
1502
CSR_WRITE_1(sc, VGE_CRS3, VGE_CR3_INT_GMSK);
sys/dev/pci/if_vge.c
1726
CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_TIMER0_ENABLE);
sys/dev/pci/if_vge.c
1776
CSR_WRITE_1(sc, VGE_PAR0 + i, sc->sc_eaddr[i]);
sys/dev/pci/if_vge.c
1813
CSR_WRITE_1(sc, VGE_RXQCSRS, VGE_RXQCSR_RUN);
sys/dev/pci/if_vge.c
1814
CSR_WRITE_1(sc, VGE_RXQCSRS, VGE_RXQCSR_WAK);
sys/dev/pci/if_vge.c
1820
CSR_WRITE_1(sc, VGE_RXCTL, VGE_RXCTL_RX_UCAST | VGE_RXCTL_RX_GIANT);
sys/dev/pci/if_vge.c
1845
CSR_WRITE_1(sc, VGE_CRS2, 0x8B);
sys/dev/pci/if_vge.c
1850
CSR_WRITE_1(sc, VGE_CRC0, VGE_CR0_STOP);
sys/dev/pci/if_vge.c
1851
CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_NOPOLL);
sys/dev/pci/if_vge.c
1852
CSR_WRITE_1(sc, VGE_CRS0,
sys/dev/pci/if_vge.c
1871
CSR_WRITE_1(sc, VGE_INTCTL1, VGE_INTCTL_TXINTSUP_DISABLE);
sys/dev/pci/if_vge.c
1875
CSR_WRITE_1(sc, VGE_INTHOLDOFF, 10); /* ~200 usecs */
sys/dev/pci/if_vge.c
1878
CSR_WRITE_1(sc, VGE_CRS3, VGE_CR3_INT_HOLDOFF);
sys/dev/pci/if_vge.c
1879
CSR_WRITE_1(sc, VGE_INTCTL1, VGE_INTCTL_SC_RELOAD);
sys/dev/pci/if_vge.c
1884
CSR_WRITE_1(sc, VGE_RXSUPPTHR, 64); /* interrupt after 64 packets */
sys/dev/pci/if_vge.c
1897
CSR_WRITE_1(sc, VGE_CRC3, VGE_CR3_INT_GMSK);
sys/dev/pci/if_vge.c
1906
CSR_WRITE_1(sc, VGE_CRS3, VGE_CR3_INT_GMSK);
sys/dev/pci/if_vge.c
1971
CSR_WRITE_1(sc, VGE_DIAGCTL, dctl);
sys/dev/pci/if_vge.c
2062
CSR_WRITE_1(sc, VGE_CRC3, VGE_CR3_INT_GMSK);
sys/dev/pci/if_vge.c
2063
CSR_WRITE_1(sc, VGE_CRS0, VGE_CR0_STOP);
sys/dev/pci/if_vge.c
2066
CSR_WRITE_1(sc, VGE_RXQCSRC, 0xFF);
sys/dev/pci/if_vge.c
2188
CSR_WRITE_1(sc, VGE_PWRSTAT, val);
sys/dev/pci/if_vge.c
2192
CSR_WRITE_1(sc, VGE_PWRSTAT, val);
sys/dev/pci/if_vge.c
2198
CSR_WRITE_1(sc, VGE_WOLCR0C, VGE_WOLCR0_PATTERN_ALL);
sys/dev/pci/if_vge.c
2200
CSR_WRITE_1(sc, VGE_WOLCR1C, 0x0F);
sys/dev/pci/if_vge.c
2201
CSR_WRITE_1(sc, VGE_WOLCFGC, VGE_WOLCFG_SAB | VGE_WOLCFG_SAM |
sys/dev/pci/if_vge.c
2204
CSR_WRITE_1(sc, VGE_WOLSR0C, 0xFF);
sys/dev/pci/if_vge.c
2205
CSR_WRITE_1(sc, VGE_WOLSR1C, 0xFF);
sys/dev/pci/if_vge.c
275
CSR_WRITE_1((sc), (reg), CSR_READ_1((sc), (reg)) | (x))
sys/dev/pci/if_vge.c
282
CSR_WRITE_1((sc), (reg), CSR_READ_1((sc), (reg)) & ~(x))
sys/dev/pci/if_vge.c
380
CSR_WRITE_1(sc, VGE_EEADDR, addr);
sys/dev/pci/if_vge.c
411
CSR_WRITE_1(sc, VGE_MIICMD, 0);
sys/dev/pci/if_vge.c
432
CSR_WRITE_1(sc, VGE_MIICMD, 0);
sys/dev/pci/if_vge.c
433
CSR_WRITE_1(sc, VGE_MIIADDR, VGE_MIIADDR_SWMPL);
sys/dev/pci/if_vge.c
449
CSR_WRITE_1(sc, VGE_MIICMD, VGE_MIICMD_MAUTO);
sys/dev/pci/if_vge.c
480
CSR_WRITE_1(sc, VGE_MIIADDR, reg);
sys/dev/pci/if_vge.c
518
CSR_WRITE_1(sc, VGE_MIIADDR, reg);
sys/dev/pci/if_vge.c
557
CSR_WRITE_1(sc, VGE_CAMADDR, VGE_CAMADDR_ENABLE);
sys/dev/pci/if_vge.c
559
CSR_WRITE_1(sc, VGE_CAM0 + i, 0);
sys/dev/pci/if_vge.c
563
CSR_WRITE_1(sc, VGE_CAMADDR, VGE_CAMADDR_ENABLE | VGE_CAMADDR_AVSEL);
sys/dev/pci/if_vge.c
565
CSR_WRITE_1(sc, VGE_CAM0 + i, 0);
sys/dev/pci/if_vge.c
567
CSR_WRITE_1(sc, VGE_CAMADDR, 0);
sys/dev/pci/if_vge.c
589
CSR_WRITE_1(sc, VGE_CAMADDR, VGE_CAMADDR_ENABLE | sc->sc_camidx);
sys/dev/pci/if_vge.c
593
CSR_WRITE_1(sc, VGE_CAM0 + i, addr[i]);
sys/dev/pci/if_vge.c
624
CSR_WRITE_1(sc, VGE_CAMADDR, 0);
sys/dev/pci/if_vge.c
721
CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_SOFTRESET);
sys/dev/pci/if_vge.c
731
CSR_WRITE_1(sc, VGE_CRS3, VGE_CR3_STOP_FORCE);
sys/dev/pci/if_vr.c
329
CSR_WRITE_1(sc, reg, \
sys/dev/pci/if_vr.c
333
CSR_WRITE_1(sc, reg, \
sys/dev/pci/if_vr.c
383
CSR_WRITE_1(sc, VR_MIICMD, (val & 0xff) | VR_MIICMD_DIRECTPGM);
sys/dev/pci/if_vr.c
394
CSR_WRITE_1(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
sys/dev/pci/if_vr.c
406
CSR_WRITE_1(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
sys/dev/pci/if_vr.c
477
CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
sys/dev/pci/if_vr.c
517
CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
sys/dev/sdmmc/sbt.c
188
CSR_WRITE_1(sc, SBT_REG_IENA, ISTAT_INTRD);
sys/dev/sdmmc/sbt.c
300
CSR_WRITE_1(sc, SBT_REG_RPC, 0);
sys/dev/sdmmc/sbt.c
304
CSR_WRITE_1(sc, SBT_REG_RPC, RPC_PCRRT);
sys/dev/sdmmc/sbt.c
310
CSR_WRITE_1(sc, SBT_REG_RPC, 0);
sys/dev/sdmmc/sbt.c
332
CSR_WRITE_1(sc, SBT_REG_ICLR, status);