CSR3I
IW_READ_CODEC_1(CSR3I, intrs);
IW_WRITE_CODEC_1(CSR3I, 0x00); /* clear status 3 reg */
IW_READ_CODEC_1(CSR3I, reg);
IW_WRITE_CODEC_1(CSR3I, reg & ~(io == IW_DMA_PLAYBACK ? 0x10 : 0x20));