sys/arch/mvme68k/dev/clock_pcc.c

175

cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL);

sys/arch/mvme68k/dev/clock_pcc.c

178

cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL);

sys/arch/mvme68k/dev/clock_pcc.c

199

cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL);

sys/arch/mvme68k/dev/clock_pcc.c

201

cr = pcc_reg_read(sys_pcc, PCCREG_TMR1_CONTROL);

sys/arch/mvme68k/dev/lpt_pcc.c

157

if (pcc_reg_read(sys_pcc, PCCREG_PRNT_INTR_CTRL) & LPI_ACKINT) {

sys/arch/mvme68k/dev/lpt_pccreg.h

83

#define lpt_control_read() pcc_reg_read(sys_pcc, PCCREG_PRNT_CONTROL)

sys/arch/mvme68k/dev/pcc.c

177

"rev %d, vecbase 0x%x\n", pcc_reg_read(sc, PCCREG_REVISION),

sys/arch/mvme68k/dev/pcc.c

178

pcc_reg_read(sc, PCCREG_VECTOR_BASE));

sys/arch/mvme68k/dev/pcc.c

198

reg = pcc_reg_read(sc, PCCREG_GENERAL_CONTROL) | PCC_GENCR_IEN;

sys/arch/mvme68k/dev/pcc.c

206

reg = pcc_reg_read(sc, PCCREG_SLAVE_BASE_ADDR) & PCC_SLAVE_BASE_MASK;

sys/arch/mvme68k/dev/wdsc.c

306

if ((pcc_reg_read(sys_pcc, PCCREG_DMA_INTR_CTRL) & 0x80) == 0)

sys/arch/mvme68k/dev/wdsc.c

314

if (pcc_reg_read(sys_pcc, PCCREG_DMA_CONTROL) & DMAC_CSR_DONE) {

sys/arch/mvme68k/dev/wdsc.c

336

if ((pcc_reg_read(sys_pcc, PCCREG_SCSI_INTR_CTRL) & 0x80) == 0)

sys/arch/mvme68k/dev/zs_pcc.c

150

ir = pcc_reg_read(sys_pcc, PCCREG_SERIAL_INTR_CTRL);