Symbol: octeon_dwc2_reg_assert
sys/arch/mips/cavium/dev/octeon_dwctwo.c
222
octeon_dwc2_reg_assert(sc, USBN_CLK_CTL_OFFSET, USBN_CLK_CTL_HCLK_RST);
sys/arch/mips/cavium/dev/octeon_dwctwo.c
262
octeon_dwc2_reg_assert(sc, USBN_USBP_CTL_STATUS_OFFSET,
sys/arch/mips/cavium/dev/octeon_dwctwo.c
278
octeon_dwc2_reg_assert(sc, USBN_CLK_CTL_OFFSET, USBN_CLK_CTL_PRST);
sys/arch/mips/cavium/dev/octeon_dwctwo.c
294
octeon_dwc2_reg_assert(sc, USBN_CLK_CTL_OFFSET, USBN_CLK_CTL_HRST);
sys/arch/mips/cavium/dev/octeon_dwctwo.c
299
octeon_dwc2_reg_assert(sc, USBN_CLK_CTL_OFFSET, USBN_CLK_CTL_ENABLE);
sys/arch/mips/cavium/dev/octeon_dwctwo.c
91
static void octeon_dwc2_reg_assert(struct octeon_dwc2_softc *, bus_size_t,