njsc32_write_1
njsc32_write_1(sc, NJSC32_REG_PARITY_CONTROL,
njsc32_write_1(sc, NJSC32_REG_SCSI_BUS_CONTROL, NJSC32_SBCTL_RST);
njsc32_write_1(sc, NJSC32_REG_SCSI_BUS_CONTROL, 0);
njsc32_write_1(sc, NJSC32_REG_SCSI_BUS_CONTROL, reg);
njsc32_write_1(sc, NJSC32_REG_SCSI_BUS_CONTROL, reg);
njsc32_write_1(sc, NJSC32_REG_PARITY_CONTROL,
njsc32_write_1(sc, NJSC32_REG_SYNC, target->t_sync);
njsc32_write_1(sc, NJSC32_REG_ACK_WIDTH, target->t_ackwidth);
njsc32_write_1(sc, NJSC32_REG_SREQ_SAMPLING, target->t_sample);
njsc32_write_1(sc, NJSC32_REG_PARITY_CONTROL,
njsc32_write_1(sc, NJSC32_REG_SCSI_OUT_LATCH, sc->sc_msgout[n]);
njsc32_write_1(sc, NJSC32_REG_SET_ARBITRATION,
njsc32_write_1(sc, NJSC32_REG_PARITY_CONTROL,
njsc32_write_1(sc, NJSC32_REG_PARITY_CONTROL,
njsc32_write_1(sc, NJSC32_REG_SYNC, 0);
njsc32_write_1(sc, NJSC32_REG_ACK_WIDTH, NJSC32_ACK_WIDTH_1CLK);
njsc32_write_1(sc, NJSC32_REG_COMMAND_DATA,
njsc32_write_1(sc, NJSC32_REG_TARGET_ID, target->t_targetid);
njsc32_write_1(sc, NJSC32_REG_SYNC, target->t_sync);
njsc32_write_1(sc, NJSC32_REG_ACK_WIDTH, target->t_ackwidth);
njsc32_write_1(sc, NJSC32_REG_SREQ_SAMPLING, target->t_sample);