CPU_ISSUN4M
if (uoba->uoba_isobio4 != 0 || !CPU_ISSUN4M)
if (CPU_ISSUN4M && (fdc->sc_flags & FDC_82077) != 0) {
if (CPU_ISSUN4M && (fdc->sc_flags & FDC_82077) != 0) {
#define OBP_FDNAME (CPU_ISSUN4M ? "SUNW,fdtwo" : "fd")
} else if (CPU_ISSUN4M) {
if (CPU_ISSUN4M) {
if (CPU_ISSUN4C || CPU_ISSUN4M) {
if (CPU_ISSUN4M) {
#define CPU_HAS_SRMMU (CPU_ISSUN4M || CPU_ISSUN4D)
if (CPU_ISSUN4M || CPU_ISSUN4D) \
if (CPU_ISSUN4M)
else if (CPU_ISSUN4M)
if (CPU_ISSUN4M) {
if (CPU_ISSUN4M) { /* skip the CPUs */
if (CPU_ISSUN4M && strcmp(ma.ma_name, "sbus") == 0) {
if (CPU_ISSUN4M && class == BUSCLASS_OBIO)
if (!CPU_ISSUN4M && !CPU_ISSUN4D)
if (CPU_ISSUN4M) {
if (CPU_ISSUN4M && bp == bootpath
if (CPU_ISSUN4M) {
if (CPU_ISSUN4M)
if (CPU_ISSUN4M) { \
CPU_ISSUN4M \
if (CPU_ISSUN4M) { \
if (CPU_ISSUN4M) { \
if (CPU_ISSUN4M) { \
if (node == 0 && CPU_ISSUN4M && bootmid != 0) {
if (!CPU_ISSUN4M || sparc_ncpus <= 1)
if (!CPU_ISSUN4M || sparc_ncpus <= 1)
displ = (CPU_ISSUN4M || CPU_ISSUN4D)
displ = (CPU_ISSUN4M || CPU_ISSUN4D)
if (CPU_ISSUN4M || CPU_ISSUN4D) {
if (CPU_ISSUN4M || CPU_ISSUN4D) {
if (CPU_ISSUN4M)
if (CPU_ISSUN4M) /* %%%: Implement! */
if (CPU_ISSUN4M) {
} else if (CPU_ISSUN4M || CPU_ISSUN4D) {
if (CPU_ISSUN4M && (fdc->sc_flags & FDC_82077) != 0) {
if (CPU_ISSUN4M && (fdc->sc_flags & FDC_82077) != 0) {
#define OBP_FDNAME (CPU_ISSUN4M ? "SUNW,fdtwo" : "fd")