mdio_write
return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 1);
return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 0);
err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable);
(err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) ||
(err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) ||
(err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) ||
(err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) ||
int (*mdio_write)(adapter_t *adapter, int phy_addr, int mmd_addr,
return phy->mdio_write(phy->adapter, phy->addr, mmd, reg, val);
phy->mdio_write = mdio_ops->write;
return mdio_write(cphy, 0, MV88E1XXX_INTR_ENABLE, INTR_ENABLE_MASK);
return mdio_write(cphy, 0, MV88E1XXX_INTR_ENABLE, 0);
mdio_write(phy, 0, MV88E1XXX_EXTENDED_ADDR, 0xb);
mdio_write(phy, 0, MV88E1XXX_EXTENDED_DATA, 0x8004);
ret = mdio_write(phy, mmd, reg, val | set);
err = mdio_write(phy, 0, MII_CTRL1000, val);
return mdio_write(phy, 0, MII_ADVERTISE, val);
return mdio_write(phy, 0, MII_BMCR, ctl);
return mdio_write(cphy, 0, VSC8211_INTR_ENABLE, INTR_MASK);
return mdio_write(cphy, 0, VSC8211_INTR_ENABLE, 0);