ixl_rd
firstq = ixl_rd(sc, I40E_PFLAN_QALLOC);
port = ixl_rd(sc, I40E_PFGEN_PORTNUM);
ari = ixl_rd(sc, I40E_GLPCI_CAPSUP);
func = ixl_rd(sc, I40E_PF_FUNC_RID);
reg = ixl_rd(sc, I40E_QRX_ENA(i));
reg = ixl_rd(sc, I40E_QTX_ENA(i));
reg = ixl_rd(sc, I40E_QTX_ENA(i));
reg = ixl_rd(sc, I40E_QRX_ENA(i));
r = ixl_rd(sc, reg);
reg = ixl_rd(sc, ena);
reg = ixl_rd(sc, ena);
reg = ixl_rd(sc, ena);
reg = ixl_rd(sc, ena);
icr = ixl_rd(sc, I40E_PFINT_ICR0);
hmc_data = ixl_rd(sc, I40E_PFHMC_ERRORDATA);
icr = ixl_rd(sc, I40E_PFINT_ICR0);
mask = ixl_rd(sc, I40E_PFINT_ICR0_ENA);
reg = ixl_rd(sc, I40E_GLGEN_RSTAT);
reg = ixl_rd(sc, I40E_PFHMC_ERRORINFO);
prod = ixl_rd(sc, sc->sc_aq_regs->arq_head) &
while (ixl_rd(sc, sc->sc_aq_regs->atq_head) != prod) {
ixl_rd(sc, I40E_GLHMC_LANQMAX);
reg = ixl_rd(sc, regs[i].objsiz);
val = ixl_rd(sc, I40E_GLPCI_CNF2);
val = ixl_rd(sc, I40E_PFLAN_QALLOC);
val = ixl_rd(sc, I40E_PF_VT_PFALLOC);
val = ixl_rd(sc, I40E_GLLAN_TXPRE_QDIS(reg_block));
grst_del = ixl_rd(sc, I40E_GLGEN_RSTCTL);
reg = ixl_rd(sc, I40E_GLGEN_RSTAT);
reg = ixl_rd(sc, I40E_GLNVM_ULD);
reg = ixl_rd(sc, I40E_PFGEN_CTRL);
reg = ixl_rd(sc, I40E_PFGEN_CTRL);
reg0 = ixl_rd(sc, I40E_GLGEN_RSTAT);
(void)ixl_rd(sc, I40E_PFINT_ICR0);
value = ixl_rd(sc, reg_lo);
value |= ((uint64_t)ixl_rd(sc, reg_hi) << 32);
val = ixl_rd(sc, reg);
reg = ixl_rd(sc, I40E_GLNVM_SRCTL);
reg = ixl_rd(sc, I40E_GLNVM_SRDATA);
#define ixl_flush(_s) (void)ixl_rd((_s), I40E_GLGEN_STAT)