CNASM_MT2
CNASM_MT2(val, CVM_MT_CRC_HALF_REFLECT, 0)
CNASM_MT2(val, CVM_MT_CRC_BYTE_REFLECT, 0)
CNASM_MT2(tmp0, CVM_MT_AES_IV, 0)
CNASM_MT2(tmp1, CVM_MT_AES_IV, 1)
CNASM_MT2(tmp0, CVM_MT_AES_##ED##0, 0) \
CNASM_MT2(tmp1, CVM_MT_AES_##ED##1, 0) \
CNASM_MT2(tmp0, CVM_MT_AES_##ED##0, 0) \
CNASM_MT2(tmp1, CVM_MT_AES_##ED##1, 0) \
CNASM_MT2(tmp0, CVM_MT_AES_##ED##0, 0) \
CNASM_MT2(tmp1, CVM_MT_AES_##ED##1, 0) \
CNASM_MT2(tmp2, CVM_MT_AES_##ED##0, 0) \
CNASM_MT2(tmp3, CVM_MT_AES_##ED##1, 0) \
CNASM_MT2(tmp0, CVM_MT_AES_##ED##0, 0) \
CNASM_MT2(tmp1, CVM_MT_AES_##ED##1, 0) \
CNASM_MT2(tmp2, CVM_MT_AES_##ED##0, 0) \
CNASM_MT2(tmp3, CVM_MT_AES_##ED##1, 0) \
CNASM_MT2(tmp0, CVM_MT_3DES_KEY, 0)
CNASM_MT2(tmp1, CVM_MT_3DES_KEY, 1)
CNASM_MT2(tmp2, CVM_MT_3DES_KEY, 2)
CNASM_MT2(tmp0, CVM_MT_3DES_IV, 0)
CNASM_MT2(tmp0, CVM_MT_3DES_##ED, 0) \
CNASM_MT2(tmp0, CVM_MT_3DES_##ED, 0) \
CNASM_MT2(tmp0, CVM_MT_3DES_##ED, 0) \
CNASM_MT2(tmp1, CVM_MT_3DES_##ED, 0) \
CNASM_MT2(tmp2, CVM_MT_3DES_##ED, 0) \
CNASM_MT2(tmp3, CVM_MT_3DES_##ED, 0) \
CNASM_MT2(tmp0, CVM_MT_3DES_##ED, 0) \
CNASM_MT2(tmp1, CVM_MT_3DES_##ED, 0) \
CNASM_MT2(tmp2, CVM_MT_3DES_##ED, 0) \
CNASM_MT2(tmp3, CVM_MT_3DES_##ED, 0) \
CNASM_MT2(tmp0, CVM_MT_HSH_IV, 0)
CNASM_MT2(tmp1, CVM_MT_HSH_IV, 1)
CNASM_MT2(tmp0, CVM_MT_HSH_DAT, 0)
CNASM_MT2(tmp1, CVM_MT_HSH_DAT, 1)
CNASM_MT2(tmp2, CVM_MT_HSH_DAT, 2)
CNASM_MT2(tmp3, CVM_MT_HSH_DAT, 3)
CNASM_MT2(tmp0, CVM_MT_HSH_DAT, 4)
CNASM_MT2(tmp1, CVM_MT_HSH_DAT, 5)
CNASM_MT2(tmp2, CVM_MT_HSH_DAT, 6)
CNASM_MT2(tmp3, CVM_MT_HSH_STANDARD5, 0)
CNASM_MT2(tmp0, CVM_MT_HSH_IV, 0)
CNASM_MT2(tmp1, CVM_MT_HSH_IV, 1)
CNASM_MT2(tmp2, CVM_MT_HSH_IV, 2)
CNASM_MT2(tmp0, CVM_MT_HSH_DAT, 0)
CNASM_MT2(tmp1, CVM_MT_HSH_DAT, 1)
CNASM_MT2(tmp2, CVM_MT_HSH_DAT, 2)
CNASM_MT2(tmp3, CVM_MT_HSH_DAT, 3)
CNASM_MT2(tmp0, CVM_MT_HSH_DAT, 4)
CNASM_MT2(tmp1, CVM_MT_HSH_DAT, 5)
CNASM_MT2(tmp0, CVM_MT_AES_KEY, 0) /* delay slot */ \
CNASM_MT2(tmp2, CVM_MT_HSH_DAT, 6)
CNASM_MT2(tmp3, CVM_MT_HSH_STARTSHA, 0)
CNASM_MT2(tmp0, CVM_MT_HSH_IV, 0)
CNASM_MT2(tmp1, CVM_MT_HSH_IV, 1)
CNASM_MT2(tmp2, CVM_MT_HSH_IV, 2)
CNASM_MT2(tmp3, CVM_MT_HSH_IV, 3)
CNASM_MT2(tmp1, CVM_MT_AES_KEY, 1) /* delay slot */ \
CNASM_MT2(tmp0, CVM_MT_HSH_DAT, 0)
CNASM_MT2(tmp1, CVM_MT_HSH_DAT, 1)
CNASM_MT2(tmp2, CVM_MT_HSH_DAT, 2)
CNASM_MT2(tmp3, CVM_MT_HSH_DAT, 3)
CNASM_MT2(tmp2, CVM_MT_AES_KEY, 2) /* delay slot */ \
CNASM_MT2(tmp0, CVM_MT_HSH_DAT, 4)
CNASM_MT2(tmp1, CVM_MT_HSH_DAT, 5)
CNASM_MT2(tmp2, CVM_MT_HSH_DAT, 6)
CNASM_MT2(tmp3, CVM_MT_HSH_STARTSHA256, 0)
CNASM_MT2(tmp3, CVM_MT_AES_KEY, 3) \
CNASM_MT2(tmp0, CVM_MT_HSH_IVW, 0)
CNASM_MT2(tmp1, CVM_MT_HSH_IVW, 1)
CNASM_MT2(tmp2, CVM_MT_HSH_IVW, 2)
CNASM_MT2(tmp3, CVM_MT_HSH_IVW, 3)
CNASM_MT2(tmp0, CVM_MT_HSH_IVW, 4)
CNASM_MT2(tmp1, CVM_MT_HSH_IVW, 5)
CNASM_MT2(tmp2, CVM_MT_HSH_IVW, 6)
CNASM_MT2(tmp3, CVM_MT_HSH_IVW, 7)
CNASM_MT2(tmp0, CVM_MT_HSH_DATW, 0)
CNASM_MT2(tmp1, CVM_MT_HSH_DATW, 1)
CNASM_MT2(tmp2, CVM_MT_HSH_DATW, 2)
CNASM_MT2(tmp3, CVM_MT_HSH_DATW, 3)
CNASM_MT2(tmp0, CVM_MT_HSH_DATW, 4)
CNASM_MT2(tmp1, CVM_MT_HSH_DATW, 5)
CNASM_MT2(tmp2, CVM_MT_HSH_DATW, 6)
CNASM_MT2(tmp3, CVM_MT_HSH_DATW, 7)
CNASM_MT2(tmp0, CVM_MT_HSH_DATW, 8)
CNASM_MT2(tmp1, CVM_MT_HSH_DATW, 9)
CNASM_MT2(tmp2, CVM_MT_HSH_DATW, 10)
CNASM_MT2(tmp3, CVM_MT_HSH_DATW, 11)
CNASM_MT2(tmp0, CVM_MT_HSH_DATW, 12)
CNASM_MT2(tmp1, CVM_MT_HSH_DATW, 13)
CNASM_MT2(tmp2, CVM_MT_HSH_DATW, 14)
CNASM_MT2(tmp3, CVM_MT_HSH_STARTSHA512, 0)
CNASM_MT2(val, CVM_MT_CRC_DWORD_REFLECT, 0)
CNASM_MT2(val, CVM_MT_CRC_DWORD_REFLECT, 0)