igs_crtc_write
igs_crtc_write(iot, ioh, 0x00, 0x5f);
igs_crtc_write(iot, ioh, 0x01, 0x4f);
igs_crtc_write(iot, ioh, 0x02, 0x50);
igs_crtc_write(iot, ioh, 0x03, 0x80);
igs_crtc_write(iot, ioh, 0x04, 0x52);
igs_crtc_write(iot, ioh, 0x05, 0x9d);
igs_crtc_write(iot, ioh, 0x06, 0x0b);
igs_crtc_write(iot, ioh, 0x07, 0x3e);
igs_crtc_write(iot, ioh, 0x08, 0x00);
igs_crtc_write(iot, ioh, 0x09, 0x40); /* <- either 0x40 or 0x60 */
igs_crtc_write(iot, ioh, 0x0a, 0x00);
igs_crtc_write(iot, ioh, 0x0b, 0x00);
igs_crtc_write(iot, ioh, 0x0c, 0x00);
igs_crtc_write(iot, ioh, 0x0d, 0x00);
igs_crtc_write(iot, ioh, 0x0e, 0x00);
igs_crtc_write(iot, ioh, 0x0f, 0x00);
igs_crtc_write(iot, ioh, 0x10, 0xe9);
igs_crtc_write(iot, ioh, 0x11, 0x8b);
igs_crtc_write(iot, ioh, 0x12, 0xdf);
igs_crtc_write(iot, ioh, 0x13, 0x50);
igs_crtc_write(iot, ioh, 0x14, 0x00);
igs_crtc_write(iot, ioh, 0x15, 0xe6);
igs_crtc_write(iot, ioh, 0x16, 0x04);
igs_crtc_write(iot, ioh, 0x17, 0xc3);
igs_crtc_write(iot, ioh, 0x18, 0xff);
igs_crtc_write(iot, ioh, 0x11, 0x00); /* write enable CRTC 0..7 */
igs_crtc_write(iot, ioh, 0x00, 0xa3);
igs_crtc_write(iot, ioh, 0x01, 0x7f);
igs_crtc_write(iot, ioh, 0x02, 0x7f); /* krups: 80 */
igs_crtc_write(iot, ioh, 0x03, 0x85); /* krups: 84 */
igs_crtc_write(iot, ioh, 0x04, 0x84); /* krups: 88 */
igs_crtc_write(iot, ioh, 0x05, 0x95); /* krups: 99 */
igs_crtc_write(iot, ioh, 0x06, 0x24);
igs_crtc_write(iot, ioh, 0x07, 0xfd);
igs_crtc_write(iot, ioh, 0x08, 0x00);
igs_crtc_write(iot, ioh, 0x09, 0x60); /* <- either 0x40 or 0x60 */
igs_crtc_write(iot, ioh, 0x0a, 0x00);
igs_crtc_write(iot, ioh, 0x0b, 0x00);
igs_crtc_write(iot, ioh, 0x0c, 0x00);
igs_crtc_write(iot, ioh, 0x0d, 0x00);
igs_crtc_write(iot, ioh, 0x0e, 0x00);
igs_crtc_write(iot, ioh, 0x0f, 0x00);
igs_crtc_write(iot, ioh, 0x10, 0x06);
igs_crtc_write(iot, ioh, 0x11, 0x8c);
igs_crtc_write(iot, ioh, 0x12, 0xff);
igs_crtc_write(iot, ioh, 0x13, 0x80); /* depends on BPP */
igs_crtc_write(iot, ioh, 0x14, 0x0f);
igs_crtc_write(iot, ioh, 0x15, 0x02);
igs_crtc_write(iot, ioh, 0x16, 0x21);
igs_crtc_write(iot, ioh, 0x17, 0xe3);
igs_crtc_write(iot, ioh, 0x18, 0xff);
igs_crtc_write(iot, ioh, 0x11, 0x00); /* write enable CRTC 0..7 */
igs_crtc_write(iot, ioh, 0x00, (mode->htotal >> 3) - 5);
igs_crtc_write(iot, ioh, 0x01, (mode->hdisplay >> 3) - 1);
igs_crtc_write(iot, ioh, 0x02, (hblank_start >> 3) - 1);
igs_crtc_write(iot, ioh, 0x03, 0x80 | (((hblank_end >> 3) - 1) & 0x1f));
igs_crtc_write(iot, ioh, 0x04, hsync_start >> 3);
igs_crtc_write(iot, ioh, 0x05, ((((hblank_end >> 3) - 1) & 0x20) << 2)
igs_crtc_write(iot, ioh, 0x06, (mode->vtotal - 2) & 0xff);
igs_crtc_write(iot, ioh, 0x07,
igs_crtc_write(iot, ioh, 0x08, 0x00);
igs_crtc_write(iot, ioh, 0x09, 0x40 |
igs_crtc_write(iot, ioh, 0x0a, 0x00);
igs_crtc_write(iot, ioh, 0x0b, 0x00);
igs_crtc_write(iot, ioh, 0x0c, 0x00);
igs_crtc_write(iot, ioh, 0x0d, 0x00);
igs_crtc_write(iot, ioh, 0x0e, 0x00);
igs_crtc_write(iot, ioh, 0x0f, 0x00);
igs_crtc_write(iot, ioh, 0x10, vsync_start & 0xff);
igs_crtc_write(iot, ioh, 0x11, (vsync_end & 0x0f) | 0x20);
igs_crtc_write(iot, ioh, 0x12, (mode->vdisplay - 1) & 0xff);
igs_crtc_write(iot, ioh, 0x13, hoffset & 0xff);
igs_crtc_write(iot, ioh, 0x14, 0x0f);
igs_crtc_write(iot, ioh, 0x15, (vblank_start - 1) & 0xff);
igs_crtc_write(iot, ioh, 0x16, (vblank_end - 1) & 0xff);
igs_crtc_write(iot, ioh, 0x17, 0xe3);
igs_crtc_write(iot, ioh, 0x18, 0xff);