sys/arch/arm/s3c2xx0/s3c2410_intr.c

108

while ((irqbits = icreg(INTCTL_INTPND)) != 0) {

sys/arch/arm/s3c2xx0/s3c2410_intr.c

112

irqno = icreg(INTCTL_INTOFFSET);

sys/arch/arm/s3c2xx0/s3c2410_intr.c

126

icreg(INTCTL_SRCPND) = PENDING_CLEAR_MASK & (1 << irqno);

sys/arch/arm/s3c2xx0/s3c2410_intr.c

127

icreg(INTCTL_INTPND) = PENDING_CLEAR_MASK & (1 << irqno);

sys/arch/arm/s3c2xx0/s3c2410_intr.c

160

irqbits = icreg(INTCTL_SUBSRCPND) &

sys/arch/arm/s3c2xx0/s3c2410_intr.c

161

~icreg(INTCTL_INTSUBMSK) & (0x07 << (3*index));

sys/arch/arm/s3c2xx0/s3c2410_intr.c

169

icreg(INTCTL_SUBSRCPND) = (1 << irqno);

sys/arch/arm/s3c2xx0/s3c2410_intr.c

229

icreg(INTCTL_INTSUBMSK) &= ~(1<<i);

sys/arch/arm/s3c2xx0/s3c2410_intr.c

300

icreg(INTCTL_SRCPND) = ~0;

sys/arch/arm/s3c2xx0/s3c2410_intr.c

301

icreg(INTCTL_INTPND) = ~0;

sys/arch/arm/s3c2xx0/s3c2410_intr.c

304

icreg(INTCTL_INTSUBMSK) = 0x7ff;

sys/arch/arm/s3c2xx0/s3c2410_intr.c

320

icreg(INTCTL_INTSUBMSK) |= bits;

sys/arch/arm/s3c2xx0/s3c2410_intr.c

328

icreg(INTCTL_INTSUBMSK) &= ~bits;

sys/arch/arm/s3c2xx0/s3c2440_intr.c

136

while ((irqbits = icreg(INTCTL_INTPND)) != 0) {

sys/arch/arm/s3c2xx0/s3c2440_intr.c

139

irqno = icreg(INTCTL_INTOFFSET);

sys/arch/arm/s3c2xx0/s3c2440_intr.c

153

icreg(INTCTL_SRCPND) = PENDING_CLEAR_MASK & (1 << irqno);

sys/arch/arm/s3c2xx0/s3c2440_intr.c

154

icreg(INTCTL_INTPND) = PENDING_CLEAR_MASK & (1 << irqno);

sys/arch/arm/s3c2xx0/s3c2440_intr.c

190

irqbits = icreg(INTCTL_SUBSRCPND) &

sys/arch/arm/s3c2xx0/s3c2440_intr.c

191

~icreg(INTCTL_INTSUBMSK) & (0x07 << (3*index));

sys/arch/arm/s3c2xx0/s3c2440_intr.c

199

icreg(INTCTL_SUBSRCPND) = (1 << irqno);

sys/arch/arm/s3c2xx0/s3c2440_intr.c

259

icreg(INTCTL_INTSUBMSK) &= ~(1<<i);

sys/arch/arm/s3c2xx0/s3c2440_intr.c

330

icreg(INTCTL_SRCPND) = ~0;

sys/arch/arm/s3c2xx0/s3c2440_intr.c

331

icreg(INTCTL_INTPND) = ~0;

sys/arch/arm/s3c2xx0/s3c2440_intr.c

334

icreg(INTCTL_INTSUBMSK) = 0x7ff;

sys/arch/arm/s3c2xx0/s3c2440_intr.c

350

icreg(INTCTL_INTSUBMSK) |= bits;

sys/arch/arm/s3c2xx0/s3c2440_intr.c

359

icreg(INTCTL_INTSUBMSK) &= ~bits;

sys/arch/arm/s3c2xx0/s3c2800_intr.c

106

icreg(INTCTL_SRCPND) = PENDING_CLEAR_MASK & (1 << irqno);

sys/arch/arm/s3c2xx0/s3c2800_intr.c

199

icreg(INTCTL_SRCPND) = 0xffffffff;

sys/arch/arm/s3c2xx0/s3c2800_intr.c

92

while ((irqbits = icreg(INTCTL_IRQPND) & ICU_INT_HWMASK) != 0) {