CLR32
CLR32(sc, RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_DISP_DIS);
CLR32(sc, RADEON_CRTC_EXT_CNTL, RADEON_CRTC_DISPLAY_DIS);
CLR32(sc, AVIVO_D1GRPH_CONTROL, AVIVO_D1GRPH_MACRO_ADDRESS_MODE);
CLR32(sc, AVIVO_D2GRPH_CONTROL, AVIVO_D1GRPH_MACRO_ADDRESS_MODE);
CLR32(sc, RADEON_DISP_MERGE_CNTL, RADEON_DISP_RGB_OFFSET_EN);
CLR32(sc, RADEON_CRTC_EXT_CNTL,
CLR32(sc, RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B);
CLR32(sc, RADEON_DISP2_MERGE_CNTL, RADEON_DISP2_RGB_OFFSET_EN);
CLR32(sc, RADEON_CRTC2_GEN_CNTL,
CLR32(sc, AVIVO_D1CRTC_CONTROL, AVIVO_CRTC_EN);
CLR32(sc, AVIVO_D2CRTC_CONTROL, AVIVO_CRTC_EN);
CLR32(sc, fpreg, fpval);
CLR32(sc, reg, mask);
CLR32(sc, RADEON_DAC_CNTL2,
CLR32(sc, AVIVO_D1CUR_UPDATE, AVIVO_D1CURSOR_UPDATE_LOCK);
CLR32(dp->rd_softc, gencntl, bit);
CLR32(sc, AVIVO_D1CUR_UPDATE, AVIVO_D1CURSOR_UPDATE_LOCK);
CLR32(sc, RADEON_FP_GEN_CNTL, RADEON_FP_SEL_CRTC2);
CLR32(sc, ric->ric_register, RADEON_GPIO_SW_USE);