CLK_PLL
CLK_PLL("pll_p", "clk_m", CAR_PLLP_BASE_REG,
CLK_PLL("pll_c", "clk_m", CAR_PLLC_BASE_REG,
CLK_PLL("pll_u", "clk_m", CAR_PLLU_BASE_REG,
CLK_PLL("pll_x", "clk_m", CAR_PLLX_BASE_REG,
CLK_PLL("pll_e", "clk_m", CAR_PLLE_BASE_REG,
CLK_PLL("pll_d", "clk_m", CAR_PLLD_BASE_REG,
CLK_PLL("pll_d2", "clk_m", CAR_PLLD2_BASE_REG,
CLK_PLL("pll_re", "clk_m", CAR_PLLREFE_BASE_REG,
CLK_PLL("PLL_P", "CLK_M", CAR_PLLP_BASE_REG,
CLK_PLL("PLL_C", "CLK_M", CAR_PLLC_BASE_REG,
CLK_PLL("PLL_U", "CLK_M", CAR_PLLU_BASE_REG,
CLK_PLL("PLL_X", "CLK_M", CAR_PLLX_BASE_REG,
CLK_PLL("PLL_E", "CLK_M", CAR_PLLE_BASE_REG,
CLK_PLL("PLL_D", "CLK_M", CAR_PLLD_BASE_REG,
CLK_PLL("PLL_D2", "CLK_M", CAR_PLLD2_BASE_REG,
CLK_PLL("PLL_REF", "CLK_M", CAR_PLLREFE_BASE_REG,
CLK_PLL("pll1", "osc", SYS, PLL_ARM, DIV_SELECT, POWERDOWN, 0),
CLK_PLL("pll2", "osc", GENERIC, PLL_SYS, DIV_SELECT, POWERDOWN, 0),
CLK_PLL("pll3", "osc", USB, PLL_USB1, DIV_SELECT, POWER, 0),
CLK_PLL("pll4", "osc", AUDIO_VIDEO, PLL_AUDIO, DIV_SELECT, POWERDOWN, 0),
CLK_PLL("pll5", "osc", AUDIO_VIDEO, PLL_VIDEO, DIV_SELECT, POWERDOWN, 0),
CLK_PLL("pll6", "osc", ENET, PLL_ENET, DIV_SELECT, POWERDOWN, 500000000),
CLK_PLL("pll7", "osc", USB, PLL_USB2, DIV_SELECT, POWER, 0),
CLK_PLL("pll1", "osc", SYS, PLL_ARM, DIV_SELECT, POWERDOWN, 0),
CLK_PLL("pll2", "osc", GENERIC, PLL_SYS, DIV_SELECT, POWERDOWN, 0),
CLK_PLL("pll3", "osc", USB, PLL_USB1, DIV_SELECT, POWER, 0),
CLK_PLL("pll4", "osc", AUDIO_VIDEO, PLL_AUDIO, DIV_SELECT, POWERDOWN, 0),
CLK_PLL("pll5", "osc", AUDIO_VIDEO, PLL_VIDEO, DIV_SELECT, POWERDOWN, 0),
CLK_PLL("pll6", "osc", ENET, PLL_ENET, DIV_SELECT, POWERDOWN, 500000000),
CLK_PLL("pll7", "osc", USB, PLL_USB2, DIV_SELECT, POWER, 0),