sys/arch/arm/nvidia/tegra124_car.c

463

CLK_MUX("mux_uarta", CAR_CLKSRC_UARTA_REG, CAR_CLKSRC_UART_SRC,

sys/arch/arm/nvidia/tegra124_car.c

465

CLK_MUX("mux_uartb", CAR_CLKSRC_UARTB_REG, CAR_CLKSRC_UART_SRC,

sys/arch/arm/nvidia/tegra124_car.c

467

CLK_MUX("mux_uartc", CAR_CLKSRC_UARTC_REG, CAR_CLKSRC_UART_SRC,

sys/arch/arm/nvidia/tegra124_car.c

469

CLK_MUX("mux_uartd", CAR_CLKSRC_UARTD_REG, CAR_CLKSRC_UART_SRC,

sys/arch/arm/nvidia/tegra124_car.c

471

CLK_MUX("mux_sdmmc1", CAR_CLKSRC_SDMMC1_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra124_car.c

473

CLK_MUX("mux_sdmmc2", CAR_CLKSRC_SDMMC2_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra124_car.c

475

CLK_MUX("mux_sdmmc3", CAR_CLKSRC_SDMMC3_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra124_car.c

477

CLK_MUX("mux_sdmmc4", CAR_CLKSRC_SDMMC4_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra124_car.c

479

CLK_MUX("mux_i2c1", CAR_CLKSRC_I2C1_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra124_car.c

480

CLK_MUX("mux_i2c2", CAR_CLKSRC_I2C2_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra124_car.c

481

CLK_MUX("mux_i2c3", CAR_CLKSRC_I2C3_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra124_car.c

482

CLK_MUX("mux_i2c4", CAR_CLKSRC_I2C4_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra124_car.c

483

CLK_MUX("mux_i2c5", CAR_CLKSRC_I2C5_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra124_car.c

484

CLK_MUX("mux_i2c6", CAR_CLKSRC_I2C6_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra124_car.c

485

CLK_MUX("mux_spi1", CAR_CLKSRC_SPI1_REG, CAR_CLKSRC_SPI_SRC, mux_spi_p),

sys/arch/arm/nvidia/tegra124_car.c

486

CLK_MUX("mux_spi2", CAR_CLKSRC_SPI2_REG, CAR_CLKSRC_SPI_SRC, mux_spi_p),

sys/arch/arm/nvidia/tegra124_car.c

487

CLK_MUX("mux_spi3", CAR_CLKSRC_SPI3_REG, CAR_CLKSRC_SPI_SRC, mux_spi_p),

sys/arch/arm/nvidia/tegra124_car.c

488

CLK_MUX("mux_spi4", CAR_CLKSRC_SPI4_REG, CAR_CLKSRC_SPI_SRC, mux_spi_p),

sys/arch/arm/nvidia/tegra124_car.c

489

CLK_MUX("mux_spi5", CAR_CLKSRC_SPI5_REG, CAR_CLKSRC_SPI_SRC, mux_spi_p),

sys/arch/arm/nvidia/tegra124_car.c

490

CLK_MUX("mux_spi6", CAR_CLKSRC_SPI6_REG, CAR_CLKSRC_SPI_SRC, mux_spi_p),

sys/arch/arm/nvidia/tegra124_car.c

491

CLK_MUX("mux_sata_oob",

sys/arch/arm/nvidia/tegra124_car.c

493

CLK_MUX("mux_sata",

sys/arch/arm/nvidia/tegra124_car.c

495

CLK_MUX("mux_hda2codec_2x",

sys/arch/arm/nvidia/tegra124_car.c

498

CLK_MUX("mux_hda",

sys/arch/arm/nvidia/tegra124_car.c

500

CLK_MUX("mux_soc_therm",

sys/arch/arm/nvidia/tegra124_car.c

503

CLK_MUX("mux_mselect",

sys/arch/arm/nvidia/tegra124_car.c

506

CLK_MUX("mux_tsensor",

sys/arch/arm/nvidia/tegra124_car.c

509

CLK_MUX("mux_host1x",

sys/arch/arm/nvidia/tegra124_car.c

512

CLK_MUX("mux_disp1",

sys/arch/arm/nvidia/tegra124_car.c

515

CLK_MUX("mux_disp2",

sys/arch/arm/nvidia/tegra124_car.c

518

CLK_MUX("mux_hdmi",

sys/arch/arm/nvidia/tegra124_car.c

521

CLK_MUX("mux_xusb_host",

sys/arch/arm/nvidia/tegra124_car.c

524

CLK_MUX("mux_xusb_falcon",

sys/arch/arm/nvidia/tegra124_car.c

527

CLK_MUX("mux_xusb_ss",

sys/arch/arm/nvidia/tegra124_car.c

530

CLK_MUX("mux_xusb_fs",

sys/arch/arm/nvidia/tegra210_car.c

485

CLK_MUX("MUX_UARTA", CAR_CLKSRC_UARTA_REG, CAR_CLKSRC_UART_SRC,

sys/arch/arm/nvidia/tegra210_car.c

487

CLK_MUX("MUX_UARTB", CAR_CLKSRC_UARTB_REG, CAR_CLKSRC_UART_SRC,

sys/arch/arm/nvidia/tegra210_car.c

489

CLK_MUX("MUX_UARTC", CAR_CLKSRC_UARTC_REG, CAR_CLKSRC_UART_SRC,

sys/arch/arm/nvidia/tegra210_car.c

491

CLK_MUX("MUX_UARTD", CAR_CLKSRC_UARTD_REG, CAR_CLKSRC_UART_SRC,

sys/arch/arm/nvidia/tegra210_car.c

494

CLK_MUX("MUX_SDMMC1", CAR_CLKSRC_SDMMC1_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra210_car.c

496

CLK_MUX("MUX_SDMMC2", CAR_CLKSRC_SDMMC2_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra210_car.c

498

CLK_MUX("MUX_SDMMC3", CAR_CLKSRC_SDMMC3_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra210_car.c

500

CLK_MUX("MUX_SDMMC4", CAR_CLKSRC_SDMMC4_REG, CAR_CLKSRC_SDMMC_SRC,

sys/arch/arm/nvidia/tegra210_car.c

503

CLK_MUX("MUX_I2C1", CAR_CLKSRC_I2C1_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra210_car.c

504

CLK_MUX("MUX_I2C2", CAR_CLKSRC_I2C2_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra210_car.c

505

CLK_MUX("MUX_I2C3", CAR_CLKSRC_I2C3_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra210_car.c

506

CLK_MUX("MUX_I2C4", CAR_CLKSRC_I2C4_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra210_car.c

507

CLK_MUX("MUX_I2C5", CAR_CLKSRC_I2C5_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra210_car.c

508

CLK_MUX("MUX_I2C6", CAR_CLKSRC_I2C6_REG, CAR_CLKSRC_I2C_SRC, mux_i2c_p),

sys/arch/arm/nvidia/tegra210_car.c

510

CLK_MUX("MUX_XUSB_HOST",

sys/arch/arm/nvidia/tegra210_car.c

513

CLK_MUX("MUX_XUSB_FALCON",

sys/arch/arm/nvidia/tegra210_car.c

516

CLK_MUX("MUX_XUSB_SS",

sys/arch/arm/nvidia/tegra210_car.c

519

CLK_MUX("MUX_XUSB_FS",

sys/arch/arm/nvidia/tegra210_car.c

523

CLK_MUX("MUX_MSELECT",

sys/arch/arm/nvidia/tegra210_car.c

527

CLK_MUX("MUX_TSENSOR",

sys/arch/arm/nvidia/tegra210_car.c

530

CLK_MUX("MUX_SOC_THERM",

sys/arch/arm/nvidia/tegra210_car.c

534

CLK_MUX("MUX_HDA2CODEC_2X",

sys/arch/arm/nvidia/tegra210_car.c

537

CLK_MUX("MUX_HDA",

sys/arch/arm/nvidia/tegra210_car.c

541

CLK_MUX("MUX_SATA_OOB",

sys/arch/arm/nvidia/tegra210_car.c

544

CLK_MUX("MUX_SATA",

sys/arch/arm/nxp/imx6_clk.c

1000

CLK_MUX("ipu1_di0_sel", ipu1_di0_p, CCM, CHSCCDR, IPU1_DI0_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1001

CLK_MUX("ipu1_di1_sel", ipu1_di1_p, CCM, CHSCCDR, IPU1_DI1_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1002

CLK_MUX("ipu2_di0_sel", ipu2_di0_p, CCM, CSCDR2, IPU2_DI0_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1003

CLK_MUX("ipu2_di1_sel", ipu2_di1_p, CCM, CSCDR2, IPU2_DI1_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1004

CLK_MUX("ldb_di0_sel", ldb_di_p, CCM, CS2CDR, LDB_DI0_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1005

CLK_MUX("ldb_di1_sel", ldb_di_p, CCM, CS2CDR, LDB_DI1_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1006

CLK_MUX("vdo_axi_sel", vdo_axi_p, CCM, CBCMR, VDOAXI_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1007

CLK_MUX("vpu_axi_sel", vpu_axi_p, CCM, CBCMR, VPU_AXI_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1008

CLK_MUX("cko1_sel", cko1_p, CCM, CCOSR, CLKO1_SEL),

sys/arch/arm/nxp/imx6_clk.c

1009

CLK_MUX("cko2_sel", cko2_p, CCM, CCOSR, CLKO2_SEL),

sys/arch/arm/nxp/imx6_clk.c

1010

CLK_MUX("cko", cko_p, CCM, CCOSR, CLK_OUT_SEL),

sys/arch/arm/nxp/imx6_clk.c

1011

CLK_MUX("hsi_tx_sel", hsi_tx_p, CCM, CDCDR, HSI_TX_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1012

CLK_MUX("pcie_axi_sel", pcie_axi_p, CCM, CBCMR, PCIE_AXI_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1013

CLK_MUX("ssi1_sel", ssi_p, CCM, CSCMR1, SSI1_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1014

CLK_MUX("ssi2_sel", ssi_p, CCM, CSCMR1, SSI2_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1015

CLK_MUX("ssi3_sel", ssi_p, CCM, CSCMR1, SSI3_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1016

CLK_MUX("usdhc1_sel", usdhc_p, CCM, CSCMR1, USDHC1_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1017

CLK_MUX("usdhc2_sel", usdhc_p, CCM, CSCMR1, USDHC2_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1018

CLK_MUX("usdhc3_sel", usdhc_p, CCM, CSCMR1, USDHC3_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1019

CLK_MUX("usdhc4_sel", usdhc_p, CCM, CSCMR1, USDHC4_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1020

CLK_MUX("eim_sel", eim_p, CCM, CSCMR1, ACLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1021

CLK_MUX("eim_slow_sel", eim_slow_p, CCM, CSCMR1, ACLK_EIM_SLOW_SEL),

sys/arch/arm/nxp/imx6_clk.c

1022

CLK_MUX("enfc_sel", enfc_p, CCM, CS2CDR, ENFC_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

1024

CLK_MUX("pll1_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_ARM, BYPASS_CLK_SRC),

sys/arch/arm/nxp/imx6_clk.c

1025

CLK_MUX("pll2_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_SYS, BYPASS_CLK_SRC),

sys/arch/arm/nxp/imx6_clk.c

1026

CLK_MUX("pll3_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_USB1, BYPASS_CLK_SRC),

sys/arch/arm/nxp/imx6_clk.c

1027

CLK_MUX("pll4_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_AUDIO, BYPASS_CLK_SRC),

sys/arch/arm/nxp/imx6_clk.c

1028

CLK_MUX("pll5_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_VIDEO, BYPASS_CLK_SRC),

sys/arch/arm/nxp/imx6_clk.c

1029

CLK_MUX("pll6_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_ENET, BYPASS_CLK_SRC),

sys/arch/arm/nxp/imx6_clk.c

1030

CLK_MUX("pll7_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_USB2, BYPASS_CLK_SRC),

sys/arch/arm/nxp/imx6_clk.c

1031

CLK_MUX("pll1_bypass", pll1_bypass_p, CCM_ANALOG, PLL_ARM, BYPASS),

sys/arch/arm/nxp/imx6_clk.c

1032

CLK_MUX("pll2_bypass", pll2_bypass_p, CCM_ANALOG, PLL_SYS, BYPASS),

sys/arch/arm/nxp/imx6_clk.c

1033

CLK_MUX("pll3_bypass", pll3_bypass_p, CCM_ANALOG, PLL_USB1, BYPASS),

sys/arch/arm/nxp/imx6_clk.c

1034

CLK_MUX("pll4_bypass", pll4_bypass_p, CCM_ANALOG, PLL_AUDIO, BYPASS),

sys/arch/arm/nxp/imx6_clk.c

1035

CLK_MUX("pll5_bypass", pll5_bypass_p, CCM_ANALOG, PLL_VIDEO, BYPASS),

sys/arch/arm/nxp/imx6_clk.c

1036

CLK_MUX("pll6_bypass", pll6_bypass_p, CCM_ANALOG, PLL_ENET, BYPASS),

sys/arch/arm/nxp/imx6_clk.c

1037

CLK_MUX("pll7_bypass", pll7_bypass_p, CCM_ANALOG, PLL_USB2, BYPASS),

sys/arch/arm/nxp/imx6_clk.c

1039

CLK_MUX("lvds1_sel", lvds_p, CCM_ANALOG, MISC1, LVDS_CLK1_SRC),

sys/arch/arm/nxp/imx6_clk.c

1040

CLK_MUX("lvds2_sel", lvds_p, CCM_ANALOG, MISC1, LVDS_CLK2_SRC),

sys/arch/arm/nxp/imx6_clk.c

981

CLK_MUX("step", step_p, CCM, CCSR, STEP_SEL),

sys/arch/arm/nxp/imx6_clk.c

982

CLK_MUX("pll1_sw", pll1_sw_p, CCM, CCSR, PLL1_SW_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

983

CLK_MUX("periph_pre", periph_pre_p, CCM, CBCMR, PRE_PERIPH_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

984

CLK_MUX("periph2_pre", periph_pre_p, CCM, CBCMR, PRE_PERIPH2_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

985

CLK_MUX("periph_clk2_sel", periph_clk2_p, CCM,CBCMR, PERIPH_CLK2_SEL),

sys/arch/arm/nxp/imx6_clk.c

986

CLK_MUX("periph2_clk2_sel", periph2_clk2_p, CCM,CBCMR, PERIPH2_CLK2_SEL),

sys/arch/arm/nxp/imx6_clk.c

987

CLK_MUX("axi_sel", axi_p, CCM, CBCDR, AXI_SEL),

sys/arch/arm/nxp/imx6_clk.c

988

CLK_MUX("asrc_sel", audio_p, CCM, CDCDR, SPDIF1_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

989

CLK_MUX("spdif_sel", audio_p, CCM, CDCDR, SPDIF0_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

990

CLK_MUX("gpu2d_core_sel", gpu2d_core_p, CCM, CBCMR, GPU2D_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

991

CLK_MUX("gpu3d_core_sel", gpu3d_core_p, CCM, CBCMR, GPU3D_CORE_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

992

CLK_MUX("gpu3d_shader_sel", gpu3d_shader_p, CCM,CBCMR, GPU3D_SHADER_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

993

CLK_MUX("esai_sel", audio_p, CCM, CSCMR2, ESAI_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

994

CLK_MUX("ipu1_sel", ipu_p, CCM, CSCDR3, IPU1_HSP_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

995

CLK_MUX("ipu2_sel", ipu_p, CCM, CSCDR3, IPU2_HSP_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

996

CLK_MUX("ipu1_di0_pre_sel", ipu_di_pre_p, CCM, CHSCCDR, IPU1_DI0_PRE_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

997

CLK_MUX("ipu1_di1_pre_sel", ipu_di_pre_p, CCM, CHSCCDR, IPU1_DI1_PRE_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

998

CLK_MUX("ipu2_di0_pre_sel", ipu_di_pre_p, CCM, CSCDR2, IPU2_DI0_PRE_CLK_SEL),

sys/arch/arm/nxp/imx6_clk.c

999

CLK_MUX("ipu2_di1_pre_sel", ipu_di_pre_p, CCM, CSCDR2, IPU2_DI1_PRE_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1068

CLK_MUX("step", step_p, CCM, CCSR, STEP_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1069

CLK_MUX("pll1_sw", pll1_sw_p, CCM, CCSR, PLL1_SW_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1070

CLK_MUX("ocram_sel", ocram_p, CCM, CBCDR, AXI_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1071

CLK_MUX("periph_pre", periph_pre_p, CCM, CBCMR, PRE_PERIPH_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1072

CLK_MUX("periph2_pre", periph2_pre_p, CCM, CBCMR, PRE_PERIPH2_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1073

CLK_MUX("periph_clk2_sel", periph_clk2_p, CCM,CBCMR, PERIPH_CLK2_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1074

CLK_MUX("periph2_clk2_sel", periph2_clk2_p, CCM,CBCMR, PERIPH2_CLK2_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1075

CLK_MUX("spdif_sel", audio_p, CCM, CDCDR, SPDIF0_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1076

CLK_MUX("audio_sel", audio_p, CCM, CDCDR, SPDIF1_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1077

CLK_MUX("vid_sel", vid_p, CCM, CSCMR2, VID_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1078

CLK_MUX("esai_sel", audio_p, CCM, CSCMR2, ESAI_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1079

CLK_MUX("ldb_di0_div_sel", ldb_di0_div_p, CCM, CSCMR2, LDB_DI0_IPU_DIV),

sys/arch/arm/nxp/imx6sx_clk.c

1080

CLK_MUX("ldb_di1_div_sel", ldb_di1_div_p, CCM, CSCMR2, LDB_DI1_IPU_DIV),

sys/arch/arm/nxp/imx6sx_clk.c

1081

CLK_MUX("can_sel", can_p, CCM, CSCMR2, CAN_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1082

CLK_MUX("uart_sel", uart_p, CCM, CSCDR1, UART_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1083

CLK_MUX("enet_pre_sel", enet_pre_p, CCM, CHSCCDR, ENET_PRE_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1084

CLK_MUX("enet_sel", enet_p, CCM, CHSCCDR, ENET_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1085

CLK_MUX("m4_pre_sel", m4_pre_p, CCM, CHSCCDR, M4_PRE_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1086

CLK_MUX("m4_sel", m4_p, CCM, CHSCCDR, M4_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1087

CLK_MUX("ecspi_sel", ecspi_p, CCM, CSCDR2, ECSPI_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1088

CLK_MUX("lcdif1_sel", lcdif1_p, CCM, CSCDR2, IPU2_DI1_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1089

CLK_MUX("lcdif1_pre_sel", lcdif1_pre_p, CCM, CSCDR2, IPU2_DI1_PRE_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1090

CLK_MUX("lcdif1_sel", lcdif1_p, CCM, CSCDR2, IPU2_DI1_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1091

CLK_MUX("lcdif2_pre_sel", lcdif2_pre_p, CCM, CSCDR2, IPU2_DI0_PRE_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1092

CLK_MUX("lcdif2_sel", lcdif2_p, CCM, CSCDR2, IPU2_DI0_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1093

CLK_MUX("display_sel", display_p, CCM, CSCDR3, IPU2_HSP_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1094

CLK_MUX("csi_sel", csi_p, CCM, CSCDR3, IPU1_HSP_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1095

CLK_MUX("qspi2_sel", qspi2_p, CCM, CS2CDR, QSPI2_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1096

CLK_MUX("ldb_di0_sel", ldb_di0_p, CCM, CS2CDR, LDB_DI0_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1097

CLK_MUX("ldb_di1_sel", ldb_di1_p, CCM, CS2CDR, LDB_DI1_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1098

CLK_MUX("cko1_sel", cko1_p, CCM, CCOSR, CLKO1_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1099

CLK_MUX("cko2_sel", cko2_p, CCM, CCOSR, CLKO2_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1100

CLK_MUX("cko", cko_p, CCM, CCOSR, CLK_OUT_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1101

CLK_MUX("pcie_axi_sel", pcie_axi_p, CCM, CBCMR, PCIE_AXI_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1102

CLK_MUX("gpu_axi_sel", gpu_axi_p, CCM, CBCMR, GPU3D_SHADER_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1103

CLK_MUX("gpu_core_sel", gpu_core_p, CCM, CBCMR, GPU3D_CORE_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1104

CLK_MUX("ssi1_sel", ssi_p, CCM, CSCMR1, SSI1_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1105

CLK_MUX("ssi2_sel", ssi_p, CCM, CSCMR1, SSI2_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1106

CLK_MUX("ssi3_sel", ssi_p, CCM, CSCMR1, SSI3_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1107

CLK_MUX("usdhc1_sel", usdhc_p, CCM, CSCMR1, USDHC1_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1108

CLK_MUX("usdhc2_sel", usdhc_p, CCM, CSCMR1, USDHC2_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1109

CLK_MUX("usdhc3_sel", usdhc_p, CCM, CSCMR1, USDHC3_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1110

CLK_MUX("usdhc4_sel", usdhc_p, CCM, CSCMR1, USDHC4_CLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1111

CLK_MUX("qspi1_sel", qspi1_p, CCM, CSCMR1, QSOI1_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1112

CLK_MUX("perclk_sel", perclk_p, CCM, CSCMR1, PERCLK_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1113

CLK_MUX("eim_slow_sel", eim_slow_p, CCM, CSCMR1, ACLK_EIM_SLOW_SEL),

sys/arch/arm/nxp/imx6sx_clk.c

1114

CLK_MUX("pll1_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_ARM, BYPASS_CLK_SRC_6SX),

sys/arch/arm/nxp/imx6sx_clk.c

1115

CLK_MUX("pll2_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_SYS, BYPASS_CLK_SRC_6SX),

sys/arch/arm/nxp/imx6sx_clk.c

1116

CLK_MUX("pll3_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_USB1, BYPASS_CLK_SRC_6SX),

sys/arch/arm/nxp/imx6sx_clk.c

1117

CLK_MUX("pll4_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_AUDIO, BYPASS_CLK_SRC_6SX),

sys/arch/arm/nxp/imx6sx_clk.c

1118

CLK_MUX("pll5_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_VIDEO, BYPASS_CLK_SRC_6SX),

sys/arch/arm/nxp/imx6sx_clk.c

1119

CLK_MUX("pll6_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_ENET, BYPASS_CLK_SRC_6SX),

sys/arch/arm/nxp/imx6sx_clk.c

1120

CLK_MUX("pll7_bypass_src", pll_bypass_src_p, CCM_ANALOG, PLL_USB2, BYPASS_CLK_SRC_6SX),

sys/arch/arm/nxp/imx6sx_clk.c

1121

CLK_MUX("pll1_bypass", pll1_bypass_p, CCM_ANALOG, PLL_ARM, BYPASS),

sys/arch/arm/nxp/imx6sx_clk.c

1122

CLK_MUX("pll2_bypass", pll2_bypass_p, CCM_ANALOG, PLL_SYS, BYPASS),

sys/arch/arm/nxp/imx6sx_clk.c

1123

CLK_MUX("pll3_bypass", pll3_bypass_p, CCM_ANALOG, PLL_USB1, BYPASS),

sys/arch/arm/nxp/imx6sx_clk.c

1124

CLK_MUX("pll4_bypass", pll4_bypass_p, CCM_ANALOG, PLL_AUDIO, BYPASS),

sys/arch/arm/nxp/imx6sx_clk.c

1125

CLK_MUX("pll5_bypass", pll5_bypass_p, CCM_ANALOG, PLL_VIDEO, BYPASS),

sys/arch/arm/nxp/imx6sx_clk.c

1126

CLK_MUX("pll6_bypass", pll6_bypass_p, CCM_ANALOG, PLL_ENET, BYPASS),

sys/arch/arm/nxp/imx6sx_clk.c

1127

CLK_MUX("pll7_bypass", pll7_bypass_p, CCM_ANALOG, PLL_USB2, BYPASS),

sys/arch/arm/nxp/imx6sx_clk.c

1129

CLK_MUX("lvds1_sel", lvds_p, CCM_ANALOG, MISC1, LVDS_CLK1_SRC),

sys/arch/arm/nxp/imx6sx_clk.c

1130

CLK_MUX("lvds2_sel", lvds_p, CCM_ANALOG, MISC1, LVDS_CLK2_SRC),

sys/arch/arm/samsung/exynos5410_clock.c

318

CLK_MUX("mout_apll", EXYNOS5410_SRC_CPU, __BIT(0), mout_apll_p),

sys/arch/arm/samsung/exynos5410_clock.c

319

CLK_MUX("mout_cpu", EXYNOS5410_SRC_CPU, __BIT(16), mout_cpu_p),

sys/arch/arm/samsung/exynos5410_clock.c

320

CLK_MUX("mout_kpll", EXYNOS5410_SRC_KFC, __BIT(0), mout_kpll_p),

sys/arch/arm/samsung/exynos5410_clock.c

321

CLK_MUX("mout_kfc", EXYNOS5410_SRC_KFC, __BIT(16), mout_kfc_p),

sys/arch/arm/samsung/exynos5410_clock.c

323

CLK_MUX("sclk_mpll", EXYNOS5410_SRC_CPERI1, __BIT(8), mout_mpll_p),

sys/arch/arm/samsung/exynos5410_clock.c

324

CLK_MUX("sclk_mpll_muxed", EXYNOS5410_SRC_TOP2, __BIT(20), mout_mpll_user_p),

sys/arch/arm/samsung/exynos5410_clock.c

325

CLK_MUX("sclk_bpll", EXYNOS5410_SRC_CDREX, __BIT(0), mout_bpll_p),

sys/arch/arm/samsung/exynos5410_clock.c

326

CLK_MUX("sclk_bpll_muxed", EXYNOS5410_SRC_TOP2, __BIT(24), mout_bpll_user_p),

sys/arch/arm/samsung/exynos5410_clock.c

327

CLK_MUX("sclk_epll", EXYNOS5410_SRC_TOP2, __BIT(12), mout_epll_p),

sys/arch/arm/samsung/exynos5410_clock.c

328

CLK_MUX("sclk_cpll", EXYNOS5410_SRC_TOP2, __BIT(8), mout_cpll_p),

sys/arch/arm/samsung/exynos5410_clock.c

329

CLK_MUX("sclk_mpll_bpll", EXYNOS5410_SRC_TOP1, __BIT(20), mout_mpll_bpll_p),

sys/arch/arm/samsung/exynos5410_clock.c

331

CLK_MUX("mout_mmc0", EXYNOS5410_SRC_FSYS, __BITS(3,0), mout_group2_p),

sys/arch/arm/samsung/exynos5410_clock.c

332

CLK_MUX("mout_mmc1", EXYNOS5410_SRC_FSYS, __BITS(7,4), mout_group2_p),

sys/arch/arm/samsung/exynos5410_clock.c

333

CLK_MUX("mout_mmc2", EXYNOS5410_SRC_FSYS, __BITS(11,8), mout_group2_p),

sys/arch/arm/samsung/exynos5410_clock.c

334

CLK_MUX("mout_usbd300", EXYNOS5410_SRC_FSYS, __BIT(28), mout_sclk_mpll_bpll_p),

sys/arch/arm/samsung/exynos5410_clock.c

335

CLK_MUX("mout_usbd301", EXYNOS5410_SRC_FSYS, __BIT(29), mout_sclk_mpll_bpll_p),

sys/arch/arm/samsung/exynos5410_clock.c

336

CLK_MUX("mout_uart0", EXYNOS5410_SRC_PERIC0, __BITS(3,0), mout_group2_p),

sys/arch/arm/samsung/exynos5410_clock.c

337

CLK_MUX("mout_uart1", EXYNOS5410_SRC_PERIC0, __BITS(7,4), mout_group2_p),

sys/arch/arm/samsung/exynos5410_clock.c

338

CLK_MUX("mout_uart2", EXYNOS5410_SRC_PERIC0, __BITS(11,8), mout_group2_p),

sys/arch/arm/samsung/exynos5410_clock.c

339

CLK_MUX("mout_uart3", EXYNOS5410_SRC_PERIC0, __BITS(15,12), mout_group2_p),

sys/arch/arm/samsung/exynos5410_clock.c

340

CLK_MUX("mout_pwm", EXYNOS5410_SRC_PERIC0, __BITS(27,24), mout_group2_p),

sys/arch/arm/samsung/exynos5410_clock.c

341

CLK_MUX("mout_aclk200", EXYNOS5410_SRC_TOP0, __BIT(12), mout_mpll_bpll_p),

sys/arch/arm/samsung/exynos5410_clock.c

342

CLK_MUX("mout_aclk400", EXYNOS5410_SRC_TOP0, __BIT(20), mout_mpll_bpll_p),

sys/arch/arm/samsung/exynos5422_clock.c

459

CLK_MUX("mout_sw_aclk200_fsys", EXYNOS5422_SRC_TOP10, __BIT(24),

sys/arch/arm/samsung/exynos5422_clock.c

461

CLK_MUX("mout_sw_aclk200_fsys2", EXYNOS5422_SRC_TOP10, __BIT(12),

sys/arch/arm/samsung/exynos5422_clock.c

463

CLK_MUX("mout_user_aclk200_fsys", EXYNOS5422_SRC_TOP3, __BIT(28),

sys/arch/arm/samsung/exynos5422_clock.c

465

CLK_MUX("mout_user_aclk200_fsys2", EXYNOS5422_SRC_TOP3, __BIT(12),

sys/arch/arm/samsung/exynos5422_clock.c

467

CLK_MUX("mout_aclk66", EXYNOS5422_SRC_TOP1, __BITS(9,8),

sys/arch/arm/samsung/exynos5422_clock.c

469

CLK_MUX("mout_aclk200_fsys", EXYNOS5422_SRC_TOP0, __BITS(25,24),

sys/arch/arm/samsung/exynos5422_clock.c

471

CLK_MUX("mout_aclk200_fsys2", EXYNOS5422_SRC_TOP0, __BITS(13,12),

sys/arch/arm/samsung/exynos5422_clock.c

474

CLK_MUX("mout_sw_aclk66", EXYNOS5422_SRC_TOP11, __BIT(8),

sys/arch/arm/samsung/exynos5422_clock.c

476

CLK_MUX("mout_user_aclk66_peric", EXYNOS5422_SRC_TOP4, __BIT(8),

sys/arch/arm/samsung/exynos5422_clock.c

479

CLK_MUX("mout_usbd301", EXYNOS5422_SRC_FSYS, __BITS(6,4),

sys/arch/arm/samsung/exynos5422_clock.c

481

CLK_MUX("mout_usbd300", EXYNOS5422_SRC_FSYS, __BITS(22,20),

sys/arch/arm/samsung/exynos5422_clock.c

483

CLK_MUX("mout_mmc0", EXYNOS5422_SRC_FSYS, __BITS(10,8),

sys/arch/arm/samsung/exynos5422_clock.c

485

CLK_MUX("mout_mmc1", EXYNOS5422_SRC_FSYS, __BITS(14,12),

sys/arch/arm/samsung/exynos5422_clock.c

487

CLK_MUX("mout_mmc2", EXYNOS5422_SRC_FSYS, __BITS(18,16),

sys/arch/arm/samsung/exynos5422_clock.c

489

CLK_MUX("mout_uart0", EXYNOS5422_SRC_PERIC0, __BITS(6,4),

sys/arch/arm/samsung/exynos5422_clock.c

491

CLK_MUX("mout_uart1", EXYNOS5422_SRC_PERIC0, __BITS(10,8),

sys/arch/arm/samsung/exynos5422_clock.c

493

CLK_MUX("mout_uart2", EXYNOS5422_SRC_PERIC0, __BITS(14,12),

sys/arch/arm/samsung/exynos5422_clock.c

495

CLK_MUX("mout_uart3", EXYNOS5422_SRC_PERIC0, __BITS(18,16),