sys/arch/arm/nvidia/tegra124_car.c

453

CLK_FIXED_DIV("pll_p_out0", "pll_p", 1),

sys/arch/arm/nvidia/tegra124_car.c

454

CLK_FIXED_DIV("pll_u_480", "pll_u", 1),

sys/arch/arm/nvidia/tegra124_car.c

455

CLK_FIXED_DIV("pll_u_60", "pll_u", 8),

sys/arch/arm/nvidia/tegra124_car.c

456

CLK_FIXED_DIV("pll_u_48", "pll_u", 10),

sys/arch/arm/nvidia/tegra124_car.c

457

CLK_FIXED_DIV("pll_u_12", "pll_u", 40),

sys/arch/arm/nvidia/tegra124_car.c

458

CLK_FIXED_DIV("pll_d_out", "pll_d", 1),

sys/arch/arm/nvidia/tegra124_car.c

459

CLK_FIXED_DIV("pll_d_out0", "pll_d", 2),

sys/arch/arm/nvidia/tegra124_car.c

460

CLK_FIXED_DIV("pll_d2_out0", "pll_d2", 1),

sys/arch/arm/nvidia/tegra124_car.c

461

CLK_FIXED_DIV("pll_re_out", "pll_re", 1),

sys/arch/arm/nvidia/tegra210_car.c

482

CLK_FIXED_DIV("PLL_U_480M", "PLL_U", 1),

sys/arch/arm/nvidia/tegra210_car.c

483

CLK_FIXED_DIV("PLL_U_48M", "PLL_U", 10),