Symbol: CLK_DIVF
sys/arch/arm/samsung/exynos5410_clock.c
222
CLK_DIVF(_name, _parent, _reg, _bits, 0)
sys/arch/arm/samsung/exynos5410_clock.c
368
CLK_DIVF("dout_mmc_pre0", "dout_mmc0", EXYNOS5410_DIV_FSYS1, __BITS(15,8),
sys/arch/arm/samsung/exynos5410_clock.c
370
CLK_DIVF("dout_mmc_pre1", "dout_mmc1", EXYNOS5410_DIV_FSYS1, __BITS(31,24),
sys/arch/arm/samsung/exynos5410_clock.c
372
CLK_DIVF("dout_mmc_pre2", "dout_mmc2", EXYNOS5410_DIV_FSYS2, __BITS(15,8),